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Tensilica provides SOC designers with everything needed to quickly design high-speed, customized functional blocks that exactly match the required application. By using Tensilica’s Xtensa processors, design teams can avoid the time and verification required by hand-coding RTL blocks in Verilog or VHDL. Because these processors are fully programmable, changes can be made in firmware after silicon production.
All Xtensa configurable processors have two essential unique features:
- Configurability - designers are offered a menu of checkbox and drop-down menu options so they can pick just the features they need
- Extensibility - designers can add multi-cycle execution units, registers, register files, and much more using the Tensilica Instruction Extension (TIE) methodology, where the designer only has to specify and verify the functional behavior of the new data path and the RTL is automatically generated.
All of the tools, including the compiler, debugger and ISS, are automatically updated to match the configuration options and all extensible options . The matching tool set is generated by the Xtensa Processor Generator at the same time the new processor RTL is created.
Processor Cores
Xtensa LX2
Tensilica’s top-of-the-line product, Xtensa LX2 takes the configurable, extensible processor to the next level with RTL-equivalent bandwidth and exceptional computational performance. This highly flexible processor is ideal for DSP and data-intensive functions.
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Xtensa 7
Tensilica's Xtensa 7 configurable, extensible processor is optimized for low-power applications and is ideal for control and DSP operations.
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Comparison
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Xtensa 7 |
Xtensa LX2 |
Major ISA Configuration Options |
Max16 |
Yes |
Yes |
MUL16/MUL32 |
Yes |
Yes |
Floating Point |
Yes |
Ye |
Vectra LX |
Not Avail |
Yes |
HiFi 2 Audio |
Not Avail |
Yes |
Linux MMU |
Yes |
Yes |
Pipeline/Architecture Options |
Pipeline Stages |
5 |
5/7 |
FLIX Technology |
Not Avail |
Yes |
Processor Interface Options |
PIF and XLMI |
Yes |
Yes |
Load/Store Units |
One |
One or Two |
Designer-Defined Ports and Queues |
Not Avail |
Yes |
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Development Tools
 The next-generation in hardware synthesis technology. XPRES Compiler produces application-specific Xtensa LX processors from ANSI C/C++ code. Both first-time Tensilica users and expert processor developers can speed SOC design using XPRES Compiler.
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Tensilica has created the most advanced and powerful yet easy-to-use tools for processor customization. Tensilica’s Processor Developer’s Toolkit contains all the tools necessary to create, analyze, and build extremely high performance application-specific processors.
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If you need to develop application code for an Xtensa processor, the Xtensa Software Developer’s Toolkit (SDK) provides a comprehensive collection of code generation and analysis tools that will speed the development process.
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The Xtensa processor generator produces optimized, fully-placed
FPGA components for any Xilinx-based SOC prototyping or
hardware emulation platform.
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Multimedia Solutions
Turnkey 24-bit audio for SOC designs, with multiple-codec
support.
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Turnkey video solutions for SOC designs, with multiple-codec
support.
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