Microprocessor Reports' December 2009 review of Xtensa LX3 and Xtensa 8
The What, Why and How of Configurable Processors
Processor Core Customization: Your SOC design team's fastest route from C to gates
How to Increase ASICs and SOC Computational Performance with Long-Word Processors
Processor Ports and Queues: Easily Overcome I/O Bandwidth Obstacles in Your Next ASIC or SOC Design
Implementing the Fast Fourier Transform (FFT)
Processor Configuration with Chris Rowen
A “generic" Xtensa processor does not exist. Each instance of the processor architecture is uniquely tuned by the system designer to ideally fit the SOC’s targeted application.
The designer can select from a broad selection of predefined standard RISC microprocessor options and can add instructions and register extensions to the tailored processor. Or the designer can use Tensilica's XPRES Compiler to automatically tailor the processor to optimize existing C/C++ code.
The Xtensa Processor Generator then creates the complete processor solution set - pre-verified processor hardware description in source RTL (Verilog or VHDL), plus supporting hardware implementation methodology scripts. This complete package includes software development tools including commercial RTOS support, and comprehensive system modeling and modeling co-verification support.
