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About Xtensa 7 (a 5-page tour)

The Xtensa Processor Generator

A “generic” Xtensa processor does not exist. Each instance of the processor architecture is uniquely tuned by the system designer to ideally fit the SOC’s targeted application. The designer can select from a broad selection of predefined standard RISC microprocessor options and can add instructions and register extensions to the tailored processor. Or the designer can use Tensilica's XPRES Compiler to automatically tailor the processor to optimize existing C/C++ code. The Xtensa Processor Generator then creates the complete processor solution set - pre-verified processor hardware description in source RTL (Verilog or VHDL), plus supporting hardware implementation methodology scripts. This complete package includes software development tools including commercial RTOS support, and comprehensive system modeling and modeling co-verification support.

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PRODUCT RESOURCES
Xtensa 7 Product Brief
Xtensa Processor Developer's Toolkit Product Brief
  Microprocessor Report's Update on Xtensa LX2 and Xtensa 7
  Epson printer
WHITE PAPERS
Configurable Processors: What, Why, How?
Catching Up with Moore’s Law: How to Exploit the Benefits of Nanometer Silicon
ARTICLES
Reducing SOC Simulation and Development Time
How to Improve ROI in SOC Designs
Automated Verification of Configurable IP Blocks
MPEG-4 is Accelerated with Xtensa V
How Tensilica Verifies Processor Cores
QUOTABLE

“We were faced with lengthening RTL (register transfer level) hardware design cycles. By using Xtensa processors, we cut the design time significantly, plus benefit from the programmability of the solution.”

Dr. Jong-Seok Park,
Vice President of LG.

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