Start With A World-Class 32-bit RISC Architecture

The base Xtensa 7 RISC processor core architecture is a 32-bit architecture designed explicitly for embedded applications - not a warmed-over desktop computer architecture repurposed for embedded-system SOCs. With a compact, patented 16/24-bit encoded instruction format and a full array of click-button configuration options, the base Xtensa processor alone delivers better performance and smaller code size than any other 32-bit RISC CPU core. But Tensilica’s Xtensa technology doesn’t stop there.

TIE: Designer Defined Extensions Deliver Stunning Results

Designer-defined instruction extensions – new instructions plus the new hardware execution units and registers that implement those instructions – are the secret ingredient that sets Xtensa light years ahead the rest. How far ahead? Tensilica customers have achieved results on complex algorithms that are 5x, 10x, even 100 times faster than conventional rigid processors.

Is Xtensa Real?

Sounds too good to be true, doesn’t it? You’ve probably had the thought while exploring Tensilica’s website. You’re thinking, “This would be great…if it really worked.”

Want proof? Independent benchmarks show that Xtensa is indeed the highest performance embedded processor core. But the real proof of the power of Xtensa technology is shown by who’s using the Xtensa processor.

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