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388VDO Video DSP Architecture
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388VDO Video DSP Product Brief
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See Microprocessor Forum Presentation: 388VDO Dual Core Video Decoder/Encoder (PDF)
Optimized Specifically for Video
To build the 388VDO Video Engine, Tensilica used its Xtensa configurable and extensible processor technology to create a dual-processor subsystem block, complete with an integrated DMA engine, that delivers full D1 Main profile decoding and ASP encoding at extremely low clock rates (needing only 172 MHz for full H.264 Main profile decode, and only 156 MHz for MPEG-4 ASP decode).
The 388VDO dual-core architecture includes one Xtensa processor configured as a Stream Processor and another as a Pixel Processor. The Stream Processor instruction set is optimized for serial processing of video data (entropy decoding, motion-vector prediction, etc.). The Stream Processor requires 32K bytes of local data memory and 40K bytes of local instruction memory. The instruction width is optimized to 32 bits. The Pixel Processor instruction set is optimized for parallel processing of pixel data using SIMD (single instruction, multiple data) techniques. The Pixel Processor requires 40K bytes of local data memory and only 24K bytes of local instruction memory. Inter-processor communication is via a 128-bit interface and the external video engine interface is through 2 32-bit buses.
The 388VDO architecture employs two Xtensa processors
Tensilica defined over 400 video-specific instructions in the 388VDO to significantly boost performance compared to general-purpose DSPs or general purpose 32-bit microprocessors. These instructions are optimized for the most performance-intensive algorithms used in video processing, including: CABAC, which achieves higher compression in H.264 main profile video; CAVLC (Context-adaptive variable-length coding), which is a lower-complexity compression algorithm used in the H.264 baseline and main profiles; deblocking, which reduces the appearance of block-like artifacts that appear in highly compressed video streams; transforms, which perform spatial compression, analogous to JPEG; and motion compensation and motion estimation, algorithms used to achieve high image quality at lower bit rates.
388VDO in a Personal Media Player (PMP) System
(Click here for larger view)
The 388VDO is a complete solution, with all video functions implemented in a processor for full programmability and easy software upgrades. The video codec software is available from Tensilica. All codecs are written entirely in C.
For an in-depth discussion of the architecture, see the paper "Anatomy of a hardware video codec" from Video/Imaging Designline.
