Industry’s Only Development Environment for Multiple-Processor SOC Hardware and Software Design

Tensilica's Software Developer's Toolkit includes the Xplorer IDE (integrated design environment), a complete Graphical User Interface (GUI) based environment to help you create application code for customized, high-performance Xtensa processors. All the code development tools are created using the same exact database as the Xtensa processor, guaranteeing the tools are aware of all Xtensa processor configuration options and instruction extensions. Xtensa Xplorer is your interface to powerful software development tools such as the advanced Xtensa XCC compiler, the cycle and pipeline accurate ISS, and multiprocessor modeling environment XTMP.

Xtensa Xplorer provides you a window into Tensilica's software development toolchain, which consists of familiar GNU-based tools such as an optimizing compiler, assembler, linker, debugger, and code profiler. Additionally, easy-to-use source code editor and a project manager (see below) help you create and maintain complex programming projects and eliminate the need to write and maintain makefiles. Tensilica's Software Developer's Toolkit is a complete development environment which eases the creation and testing of application code for Xtensa processors.

The Xtensa Xplorer IDE provides a common platform for all software development tools. Note that the tools for processor and TIE development are available in the Processor Developer's Toolkit.

For Multiple Processor SOC Design

Xplorer, while extremely useful for designs with only one Xtensa processor, is ideally targeted to multiple-processor SOC (MPSOC) designs. It facilitates MPSOC development with tools for build management; profiling; batch building; system memory map assignment; and integrated multiple-processor simulation, creation, and debugging using Tensilica’s XTensa Modeling Protocol (XTMP) or XTensa SystemC (XTSC) modeling software.

ECLIPSE Platform

The Xtensa Xplorer IDE is based in part on the open-source ECLIPSE platform for tool integration. More information on the ECLIPSE partnership can be found at www.eclipse.org.

Project Manager and Source Code Editing

Xtensa Xplorer builds on the Eclipse project management and revision control mechanisms. Xplorer automatically creates and manages project and library builds and makefiles. The designer can set the various tool options and flags (example: compiler, assembler and linker flags) using the build properties dialog window. Multiple build properties can be set depending on whether the target is to build a debug version or optimized version of the application binary. Optionally, designers can create unmanaged projects that allow total designer control over build target properties.

The C/C++ source code editor allows designers to efficiently create and modify code using rich editing and indexing capabilities. The editor uses syntax highlighting of language features such as keywords, comments, declarations, and strings to enable rapid software development and debugging. Symbol indexing allows program navigation including find declaration, find definition, and find type. Other features in the editor that speed up coding include code completion, auto indenting, and quick diff. Block comment/uncomment is useful when debugging or profiling large source files. Designers can choose other views, such as source outline, make target, and problems.

Xtensa Debugger

The debugger allows designers to target either the pipeline/cycle accurate ISS, or the fast functional simulator, TurboXim, or an external probe to a hardware development board. The GUI-based debugger allows full system visibility into a project; it controls program execution (i.e., C instruction and assembly instruction stepping, stepping into or over functions) and provides views to variables, breakpoints, memory, registers, etc,. The debugger also displays registers and internal wires defined by the designer in TIE instructions. Source and assembly code can be made visible simultaneously while debugging an application and either code window can be single stepped. The debugger interoperates seamlessly with the other development tools (compiler tool chain, instruction set simulator) to allow rapid code development for Xtensa processor systems.

Profiling Tools

Code profiling is an extremely important tool while optimizing the performance of your application code. The Xtensa Xplorer IDE enables designers to graphically view profiling results generated by Tensilica’s pipeline-accurate ISS or by the fast functional simulator, TurboXim. Additionally, for much faster and more accurate profiling, designers can generate profiling data from hardware instantiated in an FPGA or ASIC. Designers can track performance data such instruction execution count, subroutine calls, subroutine total cycles, cache performance, branch delays, interlock cycles, etc. Note that performance/cycle time profiling information only is available when profiling on real hardware.

While viewing functions in the profiling view, designers can also simultaneously view the assembly code in the disassembly view and the source code in the editor, both of which are annotated with the cycle count of the number of times each line of code is executed. The call graph view enables designers to view the entire application hierarchy caller and callee functions with a cycle count of the function and its callee functions.

There is also a pipeline view that displays a graphical representation of the instructions in a function as they progress through the processor pipeline. This representation is based on a dynamic trace information gathered when the application is executed on the cycle-accurate ISS. The pipeline viewer thus helps designers understand instruction stalls and latency issues.

The pipeline viewer helps you understand instruction stalls and latency issues.