Advanced Software Development Tools for Tensilica’s Xtensa Processors
Features
- Xtensa Xplorer graphical user interface (GUI)
- XCC advanced optimizing C/C++ Compiler
- Pipeline-modeling, cycle-accurate Instruction Set Simulator (ISS)
- Fast functional TurboXim compiled simulator [optional]
- GNU profiler, linker, debugger, assembler and utilities
- SystemC (XTSC) and C-based (XTMP) system modeling support [optional]
- Multiple processor simulation, debugging, and profiling support
- Xenergy energy estimation tool
- Project management tools
- Powerful performance visualization and analysis tools
- Feedback-directed compilation optimization for simulator and hardware targets
- Real-time trace
- JTAG debugger with support for synchronous debug and host-based I/O
- Support for several operating systems such as ThreadX, Nucleus, Linux, uCos, uItron
Benefits
- Easy-to-use Xplorer GUI based on Eclipse platform that is familiar to many developers
- Advanced high-performance optimizing compiler that generates small code size
- Compiler offers state-of-the-art inter-procedural and alias analysis
- Automatic vectorization of operations for Xtensa SIMD processors
- Automatic FLIX (VLIW) instruction bundling for multi-issue Xtensa cores
- Cycle/pipeline-accurate ISS provides detailed pipeline information
- TurboXim simulator enables rapid simulation during software development and functional verification
- XTSC and XTMP system modeling enables:
- verification of system architecture and software
- exploration of hardware-software trade-offs
- XTSC compatible with third-party EDA vendor SystemC-based simulators
- Software toolchain based on familiar GNU toolchain
- Faster, non-intusive debug with real-time trace
- Operating system ports work on all configurations of Xtensa processors
The Xtensa Software Developer’s Toolkit (SDK) provides a comprehensive collection of code generation and analysis tools that speed the software application development process. Tensilica’s Eclipse-based Xtensa Xplorer graphical user interface (GUI) serves as the cockpit for the entire development experience and also provides powerful visualization tools to aid application optimization.
The Xtensa processor developer uses the Xtensa Processor Developer’s Toolkit to configure an Xtensa processor by selecting from a menu of configuration options and extends the processor by writing application-specific custom instructions in the TIE (Tensilica Instruction Extension) language. The entire Xtensa software development tool chain, along with simulation models, RTOS ports, optimized C-libraries, etc., then are automatically generated after this configuration and instruction extension process (along with the processor RTL). This also ensures that all the software tools – the compiler, linker, assembler, debugger, instruction set simulator, et cetera -- always match and are tuned exactly to the tailored processor hardware.
Software developers have a wealth of tools available in the Xtensa Software Developer’s Toolkit. Note that the tools for processor and TIE development are available in the Processor Developer's Toolkit.
Robust Infrastructure Support
Configurability of a Tensilica processor core never compromises the underlying base Xtensa instruction set, thereby ensuring availability of a robust ecosystem of third party application software and development tools. All configurable, extensible Xtensa processors are always compatible with major operating systems, debug probes and ICE solutions; and always come with an automatically generated, complete software development toolchain including an advanced integrated development environment based on the ECLIPSE framework, a world-class compiler, a cycle-accurate SystemC-compatible instruction set simulator, and the full industry-standard GNU toolchain.
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