Industry's Easiest to Use and Most Powerful Processor Design Environment
If you've looked at Tensilica's Internet site or processor product briefs, you know that you can modify Tensilica's Xtensa processors - instruction sets, execution units, and processor I/O ports - to exactly match your application needs. The Xtensa Processor Developer’s Toolkit is the integrated design environment that delivers powerful automation tools to your desktop to guide you through the processor customization process.
Configurability of a Tensilica processor core never compromises the underlying base Xtensa instruction set, thereby ensuring availability of a robust ecosystem of third party application software and development tools. All configurable, extensible Xtensa processors are always compatible with major operating systems, debug probes and ICE solutions; and always come with an automatically generated, complete software development toolchain including an advanced integrated development environment based on the ECLIPSE framework, a world-class compiler, a cycle-accurate SystemC-compatible instruction set simulator, and the full industry-standard GNU toolchain.
You’ll find that Tensilica has created the most advanced and powerful yet easy-to-use tools for processor customization. Tensilica’s Processor Developer’s Toolkit contains all the tools necessary to create, analyze, and build extremely high performance application-specific processors.
The Design Cockpit
Tensilica’s Xtensa Xplorer GUI serves as the cockpit for the entire design
experience. From Xtensa Xplorer, you can profile your application code, identify “hot spots” that can benefit from acceleration, and make the changes necessary to speed up that code. Using a check-box menu within the GUI, you can configure processors to include features you need and remove features you don’t – options for processor interface, memories, operating system support, EDA scripts, debug and trace, and much more.
You can quickly extend the processor’s instruction set by adding new instructions using the Tensilica Instruction Extension (TIE) language, a hybrid of C and Verilog, which is the easiest-to-use method for saving power, increasing performance, and reducing clock frequency. By modifying the Xtensa processor, Tensilica’s customers often get 10 to 100 times (or more) better performance and lower power when
compared to alternative processor architectures.
This allows Xtensa processors to be used in critical SOC functions where previously standard microprocessors or DSPs could not deliver the needed performance, throughput or low-power; and hand-coded RTL hardware blocks had to be used.
Tensilica’s TIE Compiler automatically creates updates to the entire Xtensa toolchain including the ISS and SystemC models, in minutes on your desktop. From Xtensa Xplorer, you can invoke Tensilica’s XPRES Compiler, which analyzes C/C++ application code and automatically creates TIE code for Tensilica’s Xtensa processors that will significantly speed up that application. This often gives you the performance boost you need without the need to figure out the necessary processor extensions yourself.
Profile, Compare and Save Configurations
You can profile, compare and save many different processor configurations, so you can pick the right one for your application. You can use the ISS or TurboXim for simulations. Also, you can model and simulate multiple processor subsystems in this environment using Tensilica’s Xtensa Modeling Protocol (XTMP) or Tensilica's XTensa SystemC (XTSC) modeling .
Xtensa Xplorer serves as the gateway to the Xtensa Processor Generator. Once a processor configuration is finalized, the Xtensa Processor Generator creates the automatically verified Xtensa processor to match all of the configuration options and extensions you have defined, in less than an hour. A software tool chain is also created matching all processor modifications you have made.
Features
Benefits
- One integrated environment for all processor and code development tools
- Speeds processor configuration analysis and optimization
- Entire process can be automatic, with manual tuning as required
- Multiple configurations can be saved, profiled and compared
- TIE Compiler generates all software development tools and ISS models for extended and configured processors – in minutes
- Links to the Xtensa Processor Generator to automatically and quickly generate customized processor RTL
Find out more about the Xtensa Processor Developer's Toolkit on the following pages:
Find out how you can:
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