Anyone familiar with board-level design has developed an intuitive feel for packaged-processor power specifications: the processor draws a certain amount of power, give or take a percentage based on process variation and speed binning. For a variety of reasons, this intuition utterly fails with respect to vendor specifications for processor core IP.
While a packaged processor chip's measured power specs must necessarily account for all of the circuitry in the package, processor core power specifications are based on simulations; Core vendors are free to delete or ignore any number of power-dissipating functions when reporting power numbers. Many factors can greatly affect the power specifications listed on the processor core's spec sheet: the target fabrication technology (both the lithography size and the process), the cell library used to generate the core, and the execution activity imposed on the processor during power simulation. Consequently, caution and judicious reading of the vendor data sheets are called for when comparing the power numbers for competing processor IP. Rarely will you find apples to compare to apples from the data sheets alone.
Figure 1 shows a small extract from a processor core's data sheet. (The actual numbers have been obfuscated because they aren't important here.) It's the footnote that's important. The footnote informs the reader that the two power-dissipation numbers listed for the processor core are for TSMC's 0.18μm G and 0.13μm LVLK IC-fabrication processes. The footnote also states that synthesis has been optimized for power and that the power specifications do not include the clock tree. Note that all of this information is critically important when comparing processor cores. Also note that the information in this footnote is incomplete.
Consider the facts listed in Figure 1's footnote: