Processor Core Customization: Your SOC design team’s fastest route from C to gates

Processor Core Customization:  Your SOC design team's fastest route from C to gates

The manager's quick guide to leading your SOC design team out of verification Hell and toward a successful first-time tapeout

SOC complexity has skyrocketed in the last several years thanks to the relentless application of Moore's Law. The result: a double-edged sword that allows SOC design teams to reach for the technological stars while, at the same time, being dragged into verification Hell. It need not be this way. The solution is remarkably familiar and easier than you might think.

The state of SOC design

How did we get here? Figure 1 shows the answer. The custom-IC revolution started with gate arrays in the early 1980s. Prior to the introduction of gate arrays, the development of custom chips was limited to a few companies that had the money and resources to develop their own ICs. Gate array vendors hid much of the complexity and cost of physical IC design and allowed logic-design teams to cast their designs in silicon instead of circuit boards. The result was electric. Many more companies could afford custom chips using the gate-array route and system complexity jumped. By 1990, with the introduction of logic synthesis, logic-design teams could tackle even more complex system designs by creating standard-cell ASICs. System complexity jumped again and the cost to use this design methodology also jumped, to accommodate the required EDA tools, but logic designers could still create ASICs while staying relatively aloof from the nitty gritty aspects of physical design.

By the era of the SOC (essentially an ASIC with an on-chip processor, RAM, and ROM) and the advent of nanometer lithographies, the party started to wind down. Design complexities of many millions of logic gates meant that system designs were now very complex. Gate-level verification became a real burden. The cost and time required for verification started to approach that of the design itself.

Now the industry is in the era of the multicore SOC and chip-level complexities have hit new highs. For many design projects, verification represents more than half of the development cost. Design is no longer the leading consideration. Something has clearly gone wrong. Usually, companies promising a solution to this growing problem invoke the phrase "higher level of abstraction." But just what does that phrase mean and why will a higher abstraction level help?

The starting point: algorithms

The place to start is with the most fundamental part of system design: algorithm development. Systems are collections of independently and dependently operating algorithms. For example, a multimedia player uses one algorithm to decompress a media stream, another to decode the video into a series of images, and yet another algorithm to decode the audio into sound. Baseband radio chips employ a very large variety of algorithms such as FFTs and inverse FFTs, rake filters, Viterbi and Turbo decoders, etc. All systems are based on the execution of one or more algorithms.