Analyze Configurations

Product Briefs

Xtensa Processor Developer's Toolkit Product Brief

Xtensa Software Developer's Toolkit Product Brief

White Papers

TIE - The Fast Path to High-Performance Embedded SOC Processing

Optimize SOC Performance Using Memory Tuning and System Simulation

Avoid Bus Bottlenecks and Get More Performance from your ASIC and SOC Designs by Using High-Speed On-Chip I/O

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Xtensa Xplorer - a Total Analysis Environment

Xtensa Xplorer helps designers analyze and select configurations to meet speed/area goals. The Xtensa Xplorer design environment provides automatic estimates of the area impact of designer-defined instructions.

Xtensa Xplorer provides valuable estimates so you can make trade-offs in your designs

Performance charts visually compare different configurations. In the chart below, two configurations are compared and the difference in the number of cycles and the number of cache misses is significant.

The Cache Xplorer automatically profiles code and visualizes results across a range of cache configuration options. The chart below clearly shows the performance impact of varying cache sizes.