ConnX Baseband Engine Product Brief
ConnX Atlas LTE Reference Architecture Product Brief
Xtensa LX2 with Vectra Product Brief
HiFi 2 Audio DSP Product Brief
388VDO Video DSP Product Brief
Cut DSP Development Time - Get High Performance From C, No Assembly Required
Optimizing a DSP Architecture for Wireless Baseband
A Designers Guide to HD Video Pre- and Post-Processing
Put Low-Power, Low-Overhead, High-Fidelity Digital Sound in Your Next ASIC or SOC
See our complete white paper library
The Five Pitfalls of 4G Baseband SOC Design
Everything You Wanted to Know About Video Processing - but Were Afraid to See
Everything You Wanted to Know About Blu-ray Audio - but were Afraid to Hear
Turbo Coding on Xtensa Processors
Implementing the Fast Fourier Transform (FFT)
See our complete application note library
Tensilica Plays Baseband - New ConnX Core Aims for Low-Power Wireless Communications - Microprocessor Report
Tensilica Xtensa LX Processor with Vectra LX - BDTI
See our Embedded Processor Forum 2004 presentation on Vectra LX titled, “A Second-Generation High-performance DSP Engine."
See BDTI's independent analysis of the Xtensa LX processor with Vectra LX.
Tensilica's ConnX Bectra LX DSP engine is a quad-MAC DSP powerhouse. While it's relatively small and low power, it performs so well it helped Tensilica get the highest score on the BDTI Benchmark*.
The Vectra LX DSP engine can be added to the base Xtensa LX processor core with just a click of a configuration button in the Xtensa LX processor generator. The Vectra LX engine takes advantage of the FLIX architecture and uses 64-bit instruction words containing three issue slots for ALU, multiply-accumulate, and load/sore operations. Design teams interested in modifying the Vectra LX DSP engine for specific configurations should contact Tensilica. The Vectra LX engine is fully supported by the entire Tensilica software environment including advanced auto-vectorization capabilities in the Xtensa C/C++ Compiler (XCC). XCC enables Vectra LX engine users to reap the benefits of vector processing on a SIMD engine without manual assembly-level coding.
| Simple RISC Engine | Minimal configuration Xtensa LX2 using software multiply | 155,389 cycles |
| Scalar Performance | Base Xtensa LX2 processor with MUL32 option | 23,633 cycles |
| FLIX Performance | Xtensa LX2 with Vectra LX option | 994 cycles |
Vectra LX DSP engine really accelerates FFT performance
* The BDTIsimMark2000™ provides a summary measure of DSP speed. For more information and scores see www.BDTI.com. Scores © 2004 BDTI.
