Diamond 106Micro Product Brief
Diamond Software Tools Product Brief
10 Tips for Successful SOC Design
Xtensa Architecture White Paper
See Microprocessor Report's Write-up on Diamond Processors
Tensilica's Diamond Standard processor family covers the broadest range of performance of any embedded computing architecture. Here are several charts to help you figure out which processor core is best for your needs.

Diamond Standard Controllers - From Cache-less Controller to High-Performance VLIW CPU
| Characteristic |
106Micro
|
108Mini
|
212GP
|
232L
|
570T
|
| Max Frequency (65 GP) |
610 MHz |
615 MHz
|
600 MHz
|
520 MHz
|
560 MHz
|
| Dhrystone MIPS/MHz | 1.22 |
1.34
|
1.38
|
1.38
|
1.59
|
| Area, post-synthesis (65 GP) | 0.073 mm2 |
0.135 mm2
|
0.183 mm2
|
0.22 mm2
|
0.26 mm2
|
| Area, post layout (65 GP) |
0.078 mm2 (85%) |
0.143 mm2 (85%)
|
0.197 mm2 (85%)
|
0.24 mm2 (85%)
|
0.28 mm2 (65%)
|
| Power, mW per MHz (65 GP, typical conditions) | 0.03 |
0.041
|
0.062
|
0.062
|
0.08
|
| # Pipeline Stages | 5 |
5
|
5
|
5
|
5
|
| Instruction Width | 16/24 bit | 16/24 bit | 16/24 bit | 16/24 bit | 16/24/64 bit 3-issue |
| General Purpose I/O Ports | No | Yes | Yes | Yes | Yes |
| High-Throughput Data Queues (FIFOs) | No | No | No | No | Yes |
| 106Micro | 108Mini | 212GP | 232L |
570T
|
330HiFi | 545CK | |
| Pipeline stages | 5 | 5 | 5 | 5 | 5 | 5 | 5 |
| Instruction width (bits) | 16/24 | 16/24 | 16/24 | 16/24` | 16/24/64 | 16/24/64 | 16/24/64 |
| Multiple instruction issue (static superscalar) | no | no | no | no | 3 issue or 2 issue | 2 issue | 3 issue |
| Local memory data path width (bits) | 32 | 32 | 32 | 32 | 64 | 64 | 64 |
| General purpose registers | 32 | 32 | 32 | 32 | 32 | 32 | 64 |
| Custom vector registers | N/A | N/A | N/A | N/A | N/A | 8x48-bit & 4x56-bit | 16x160-bit |
| Instruction cache size |
N/A |
N/A | 8 Kbyte | 16 Kbyte | 16 Kbyte | 4 Kbyte | N/A |
| I-Cache associativity |
N/A |
N/A | 2-way | 4-way | 2-way | 2-way | N/A |
| Data cache size | N/A | N/A | 8 Kbyte | 16 Kbyte | 16 Kbyte | 8 Kbyte | N/A |
| D-Cache associativity | N/A | N/A | 2-way | 4-way | 2-way | 2-way | N/A |
| Load/Store units | 1 | 1 | 1 | 1 | 1 | 1 | 2 |
| Local instruction RAM, user selectable size, maximum size | 128 Kbyte | 128 Kbyte | 128 Kbyte | N/A | 128 Kbyte | 128 Kbyte | 128 Kbyte |
| Local data RAM, user selectable size, maximum size | 128 Kbyte | 128 Kbyte (dual) | 128 Kbyte | N/A | 128 Kbyte | 128 Kbyte (dual) | 128 Kbyte (dual) |
| XLMI Interface | no | no | yes | no | yes | no | no |
| Input/output ports (32 bits wide) | no | yes | yes | yes | yes | yes | no |
| Input/output queues (32 bits wide) | no | no | no | no | yes | yes | yes |
| System interface (PIF) width | 32 | 32 | 32 | 32 | 64 | 64 | 128 |
| MUL 16 | yes | yes | yes | yes | yes | yes | yes |
| MAC 16-bit single cycle | no | no | yes | yes | yes | no | no |
| 32x32 MUL32 | yes | yes | yes | yes | dual | yes | no |
| 32-bit integer divide | no | yes | yes | yes | yes | no | no |
| Sign Extend, NSA, MIN/MAX | yes | yes | yes | yes | yes | yes | yes |
| Zero-overhead looping | no | no | yes | yes | yes | yes | yes |
| Specialized DSP instructions | no | no | no | no | no | yes (audio) | yes |
| External interrupts | 12 | 16 | 16 | 16 | 16 | 16 | 16 |
| Timer interrupts | 1 | 3 | 3 | 3 | 3 | 3 | 3 |
| Software interrupts | 1 | 2 | 2 | 2 | 2 | 2 | 2 |
| Non-maskable interrupt | yes | yes | yes | yes | yes | yes | yes |
| On-chip debug (OCD) | yes | yes | yes | yes | yes | yes | yes |
Check out our Diamond FREE software evaluation.