Diamond Standard Processors - Overview

Products » Diamond Controllers

The Broadest Range of Architecturally Compatible 32-bit Controllers

Tensilica’s Diamond Standard Series processor family of synthesizable cores range from a very small 32-bit ultra-low power, cache-less RISC controller to a powerful high-performance 3-issue VLIW CPU. The Diamond Standard family covers the broadest range of performance of any embedded computing architecture and have been proven in many customers' designs.

The Diamond Standard processor family is based on Tensilica’s highly efficient Xtensa configurable and extensible processor architecture. Therefore, it’s easy for designers to bridge to Tensilica’s Xtensa processor product line if additional customization is required.

Diamond controllers

Diamond Standard Family
From Cache-less Controller to High-Performance VLIW CPU

The Diamond Standard processors are supported by an optimized set of Diamond Standard software tools, available for a free evaluation download, and a wide range of industry, ranging from top-tier ASIC and foundry partners to companies that provide operating system support, co-verification, in-circuit emulation, EDA tools, and more.

See our white paper library for even more information.

Diamond Standard Series Lineup
Diamond
106Micro		 Smallest 32-bit, ultra-low power, cache-less RISC controller with local memories.
Diamond
108Mini		 Small cache-less RISC controller with local memories and right interrupt architecture
Diamond
212GP		 Mid-range RISC controller with DSP instructions, I/D caches, TCMs
Diamond
233L		 Mid-range CPU with MMU for Linux, DSP instructions, I/D caches
Diamond
570T		 Very high-performance CPU with 3-issue VLIW architecture

Features

  • Family spans an extremely wide performance range
  • Modern, highly-efficient 32-bit RISC/DSP 5-stage architecture
  • 16/24-bit Instruction encoding yields 25-50% smaller code than 31/16-bit ISAs
  • 64-bit VLIW encoding on Diamond 570T
  • Compiler optimizes instruction length for high code density, modelessly switching between instruction types
  • Used across wide range of applications, from networking to consumer products
  • Fine and coarse-grained clock gating for ultra-low power
  • AMBA bus interfaces
  • Flexible direct Ports and Queues bypass the bus, speeding I/O on most models

Benefits

  • Extremely efficient base architecture is smaller, lower power, and has better code density than other comparable programmable 32-bit RISC-based architectures
  • Quick time-to-market through utilization of off-the-shelf synthesizable CPU or DSP IP
  • Broad silicon supplier support for the Diamond series minimizes IP evaluation effort and risk
  • Low power consumption is suitable for portable applications
  • Single architecture with extremely wide performance range covers most controller and DSP application tasks

 

Marketing Agency