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Standard Cores Cannot Solve Your Technical Challenges?

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Quickly Create a Data Plane, Datapath, or DSP Engine for Your Application Needs

Old Thinking:

My 32-bit RISC processor can't meet my performance goals. So I'll use it for control, and have my designers build custom hardware blocks for the compute-intensive functions, like networking, audio, and video.

Modern Thinking:

I'll accelerate those functions right in the Xtensa processor, saving verification time and shortening my overall SOC design cycle. And I'll use Tensilica's audio and video processors for a programmable multimedia design.

When standard 32-bit RISC processor cores can't meet performance goals, most companies turn to hardware accelerator blocks for those functions that need that extra boost. But now there's a better way. Designers have proven, in hundreds of designs, that it's better to accelerate the design functions right in the datapath of the processor.

Because Tensilica's Xtensa processors are configurable and extensible, Xtensa processors can do things standard processors have never been able to do. By using Xtensa processors, your project will greatly benefit from a faster design time, improved performance, and lower verification costs. Instead of designing complex and buggy state machines with logic blocks, use multiple Xtensa processors instead.

What type of design are you working on? See examples of what Tensilica's Xtensa processors can do to accelerate functions for:

It's much easier to accelerate functions in an Xtensa processor than develop and verify a block of hardware. Here are some examples of accelerated functions, including creating multi-cycle execution units, creating SIMD execution units, and much more. And our design process is totally automated, so you get a matching software tool chain.

Adding functions to a Tensilica processor core never compromises the underlying base Xtensa instruction set, thereby ensuring availability of a robust ecosystem of third party application software and development tools. All configurable, extensible Xtensa processors are always compatible with major operating systems, debug probes and ICE solutions; and always come with an automatically generated, complete software development toolchain including an advanced integrated development environment based on the ECLIPSE framework, a world-class compiler, a cycle-accurate SystemC-compatible instruction set simulator, and the full industry-standard GNU toolchain.