Synopsys, Inc. develops, markets, and supports a wide range of IC design products that are used by designers of advanced ICs, including system-on-a-chip ICs and electronics. Tensilica is a member of the IP Catalyst program and provides automated support for numerous Synopsys products in the Xtensa design flow including Design Compiler, Physical Compiler for a high performance flow, VCS logic simulation, Power Compiler, Design Power, Apollo, Saturn Place & Route, VERA verification, PrimeTime static timing verification, and DFT-Compiler for test.

For a complete list of EDA tools and the EDA tool flow supported by Tensilica, click here.