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Press Releases 2000

December 11, 2000
Tensilica Licenses Xtensa to National Semiconductor for Wireless Internet Chipset
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November 16, 2000
Sophia Systems Offering JTAG Emulator, UniSTACTM/J for Xtensa, for Tensilica's Xtensa IP
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November 15, 2000
Osaka and Kyoto University to Use Tensilica Processor IP
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November 15, 2000
NEC Upgrades IP License Agreement with Tensilica
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November 13, 2000
Tensilica Appoints Steve Roddy Director of Product Marketing
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October 9, 2000
Tensilica Unveils Comprehensive Third Party Customer Support Network
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October 9, 2000
Tensilica Appoints Virtual IP Group as an Authorized Design Center
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October 9, 2000
Tensilica Appoints Tonbu as an Authorized Design Center
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October 9, 2000
Tensilica Appoints Silicon Media as an Authorized Design Center
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October 9, 2000
Tensilica and Virtual IP Group Announce MP3 Decoder for the Xtensa Processor
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October 9, 2000
Intrinsix Named an Authorized Design Center by Tensilica
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October 9, 2000
Tensilica appoints Global UniChip as an Authorized Design Center
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October 9, 2000
Tensilica Licenses Dolby Digital for Xtensa III IP
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July 14 , 2000
Tensilica Unveils Feature-Rich Third Generation Xtensa Configurable Processor Technology
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July 14 , 2000
Tensilica Unveils Feature-Rich Third Generation Xtensa Configurable Processor Technology
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June 5, 2000
Tensilica Named a Hot Private Company for 2000 by UPSIDE Magazine
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May 24 , 2000
Synopsys and Tensilica Partner to Provide New Cycle-Accurate Model Generation Platform
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May 22 , 2000
Tensilica to Unveil Xtensa III Technology, New Options at Embedded Processor Forum
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May 15 , 2000
Tensilica Processor IP Licensed to Berkeley Wireless Research Center
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May 1 , 2000
Tensilica Releases Upgraded XT1000 Emulation Kit
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February 29, 2000
Tensilica Announces RTOS Targeting Kit for Xtensa Processors
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February 29, 2000
Accelerated Technology and Tensilica Alliance Provide Comprehensive Hardware and Software Solution with Nucleus PLUS Support for the Xtensa Processor
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February 28, 2000
Wind River, Tensilica Create First Real-time Operating System and Integrated Development Environment for a Configurable Processor
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February 21, 2000
Tensilica Processor IP Selected by NEC
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SOC book
RECOGNITION
Red herring top 100
Portable Design 2006 Editor's  Choice Award
Best Processor Cores of 2004
EDN's Hot 100 Products of 2006
QUOTABLE

“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.