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Presentations

Tensilica often presents at technical and industry conferences. Here are some of the up-to-date presentations and conference papers from the most recent conferences. We post PDFs of Online Seminars and Conference Presentations.

Online Seminars - Viewable Any Time

Quickly Design Low-Cost Custom Logic Using a Synthesizable 200 MHz 32-bit Controller (with NEC)

Evaluating Implementation Choices for Low-Power Digital Sound SOCs
PDF of Powerpoint presentation

Everything You Know About Microprocessors is Wrong
PDF of Powerpoint presentation

Selecting Video IP for SOC Designs: Ask the Tough Questions
PDF of Powerpoint presentation

Low-Power, Low-Overhead, High-Fidelity Digital Sound for SOCs
PDF of Powerpoint presentation

Low Cost and Low Risk 32-bit Controllers for Designing AMBA-based SOCs
PDF of Powerpoint presentation

How to Reduce Power and Energy Consumption through ISA Extension
PDF of Powerpoint presentation

Achieving Very High-Performance Processing in Networking Data Plane
PDF of Powerpoint presentation

Conference Presentations

Globalpress 2008 Conference
March 31, 2008

Energy Breakthrough in Chip Design

Portable Design Conference
October 3, 2007

Low-Power, Low-Overhead High-Fidelity Digital Sound for SOCs
by Steve Leibson

Portable Design Conference
October 3, 2007

Reduce Power and Energy Consumption through ISA Extensions
by Steve Leibson

Colorado State University Distinguished Lecture
October 2, 2007

Everything You Know About Microprocessors is Wrong
by Steve Leibson

Colorado State University Distinguished Lecture
October 1, 2007

Challenges in Consumer Electronics for the 21st Century
by Steve Leibson

WORLDCOMP Keynote
June 25, 2007
Challenges in Consumer Electronics for the 21st Century
by Steve Leibson

Microprocessor Forum
May 23, 2007
Diamond 388VDO Dual Core Video Decoder/Encoder

Linley Group Tech Seminar - CPU Cores and IP for Networking
January 31, 2007
Networking Applications for Xtensa Configurable Processors

OnDesign Radio
Listen to Chris Rowen's interview on OnDesignRadio - a podcast at: http://www.ondesignradio.com/podcast/

Denali MemCon
September 13, 2006 - Santa Clara, California
Configurable Processors: Driving Efficient and Flexible Memory and I/O in SOC Designs - Speech by Chris Rowen

The 2006 World Congress in Computer Science, Computer Engineering, and Applied Computing
June 26, 2006 - Las Vegas, Nevada
The Reinvention of the Microprocessor - Keynote speech by Chris Rowen.

ERSA 2006 (Engineering of Reconfigurable Systems and Algorithms)
June 26, 2006 - Las Vegas, Nevada
Using Configurable Processors for High-Efficiency Multiple-Processor Systems Keynote speech by Chris Rowen

Linley Group CPU Cores and IP for Networking Seminar
January 25, 2006
Networking Applications for Xtensa Configurable Processors

Fall Processor Forum
October 25, 2005
High-Performance Multicore Video Decoder Technology Preview

Design Automation Conference (DAC)
June 15, 2005
Implementing Low-Power Configurable Processors: Practical Options and Tradeoffs

Spring Processor Forum
May 18, 2005
Next-Generation Audio Engine Technology Preview

Grand Opening of China Office
March 9, 2005
Accelerating Advanced IC Design in China
by Chris Rowen

EDA Consortium
February 24, 2005
IP Forecast: Fundamental Change in IP + EDA Opportunity
by Chris Rowen

Design Automation Conference (DAC)
June 10, 2004
MPSOC

GSPx and International Signal Processing Conference 2004
September 30, 2004
Building a Multi-Issue Vector DSP with Configurable-Processor Technology

Synopsys Users Group (SNUG) 2004
September 8, 2004
Implementing Power Management IP for Dynamic and Static Power Reduction in Configurable Microprocessors using the Galaxy Design Platform at 130nm
Presentation
Paper

Hot Chips Conference
August 22, 2004
The End of ISA Design: Power Tools for Optimal Processor Generation

Hot Chips Conference
August 22, 2004
Long Words and Wide Ports: Reinventing the Configurable Processor

Embedded Processor Forum
May 19, 2004
The Next-Generation Xtensa Configurable Core with FLIX

Embedded Processor Forum
May 18, 2004
A Second-Generation High-performance DSP Engine

First International SOC Conference
April 19, 2004
Designing with Configurable Processors Instead of RTL

International Symposium on SOC 2003
November 19, 2003
SOC Logic Development Using Configurable, Application-Specific Processors

IP-based SOC Design Workshop
November 13, 2003
Throttle IP Core Power Dissipation: Use RTL Power Analysis Early and Often

International Cadence Users Group
September 15, 2003
Interconnect Cross-Talk Induced Delay and Noise Glitch Analysis for Embedded Microprocessor Designs
Presentation
Paper

Embedded Processor Forum
June 17, 2003
Automatic Generation of Processor Extensions

GSPx and International Signal Processing Conference 2003
April 2, 2003
SOC-Based Signal Processing:
Meeting Performance Goals With Tailored DSPs


Synopsys Users Group (SNUG) 2003
March 17, 2003
Logic and Physical Synthesis Methodology for High Performance VLIW/SIMD DSP Core (paper)
Presentation (PDF)

Nikkei Electronics Embedded Processor Symposium

October 30, 2002
Configurable Processor Core Xtensa Architecture for Multiple Processor SOC

IP Based SOC Design Workshop
October 30, 2002
Reduce SOC Simulation and Development Time by Designing with Processors, Not Gates

Audio Engineering Society
October 7, 2002
Configurable Microprocessor Implementation of Low Bit Rate Audio Decoding

Online Seminar
2002
Verification and Debug of Xtensa Configurable Processors (with Mentor Graphics)

SOC book
RECOGNITION
Red herring top 100
Portable Design 2006 Editor's  Choice Award
Best Processor Cores of 2004
EDN's Hot 100 Products of 2006
QUOTABLE

“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.