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January 22, 2008

Tensilica Adds Support for High-Speed, Hardware-Based Processor Simulations using Avnet’s Xilinx Virtex-4 LX200 Development Kit

SANTA CLARA , Calif. - January 22, 2008 - Tensilica, Inc. today announced that it has added support for Avnet's Xilinx Virtex-4 LX200 Development Kit for high-speed hardware-based simulations of its Xtensa configurable and Diamond Standard processor families. Now software developers can choose between the cost-effective Avnet LX60 board and the high-capacity Avnet LX200 board to speed their software design, debug and program optimization processes.

"Design teams need to complete as much of the software development process as possible in parallel with the hardware development for complex System on Chip designs," stated Steve Roddy, Tensilica's vice president of marketing. "By emulating our processors in an Avnet FPGA board, software developers can significantly speed up their development cycles when compared to using only software simulation methods."

Tensilica's software developers' toolkits (SDKs) - consisting of an IDE (the Xtensa XplorerT integrated design environment), code development toolchain and Tensilica's instruction set simulator (ISS) - work seamlessly with either Avnet FPGA board. The software tools include libraries that enable software developers to use standard C library functions such as print to print out to the host PC and read/write from the hard disk of the host PC.

Designers using Tensilica's processors can take maximum advantage of an Avnet Virtex-4 Development Kit to gather extensive hardware-based profiling information. With hardware-based profiling, developers can get an execution profile of the program, which allows the developer to quickly pinpoint execution hotspots. This profile can be viewed graphically within Tensilica's Xtensa Xplorer IDE.

Using feedback compilation, a developer can set a flag so statistics can be collected on the number of times branches (loops, jumps, etc.) are taken or not taken during execution on the Avnet Xilinx Development Kit board. The Xtensa C/C++ compiler then uses these run-time generated statistics and recompiles the program to optimize (a) for speed by placing most frequently taken branches in straight-line code, and (b) for code size by compiling less frequently executed routines for code size rather than speed. The feedback-based compilation method speeds up applications between 5 to 15 percent and reduces code size by up to 15 percent.

Additionally, the Ethernet interface on the boards make them ideal for running an operating system such as Linux and the associated TCP/IP stack and network file systems.

Pricing and Availability

The two Avnet Xilinx Virtex-4 Development Kits are available directly from Avnet at: http://em.avnet.com/tensilica1 and http://em.avnet.com/tensilica2 .

Tensilica supplies users with precompiled FPGA bitstreams that support the LX60 and LX200 boards. Bitstreams for the Diamond Standard processor family for the Avnet FPGA boards is available now from Tensilica starting at $3000. For users of Tensilica's Xtensa configurable processors, the Tensilica processor generator automatically creates a custom FPGA bitstream specific to the Avnet boards for each new Xtensa core configuration. Tensilica customers can use these bitstreams on an unlimited number of Avnet LX60 or Avnet LX200 boards, thus enabling development teams with large numbers of software designers to cost-effectively deploy a large number of development systems.

About Tensilica

Tensilica, Inc., is the recognized leader in configurable processor technology and has leveraged that technology to become the leading supplier of licensable controllers and DSP cores for mobile audio and video applications. Tensilica offers the broadest line of controller, CPU, network, and specialty DSP processors on the market today - including full software toolchain and modeling support - in both an off-the-shelf format via the Diamond Standard Series cores and with full designer configurability with the Xtensa processor family. The modern design behind all of Tensilica's processor cores provide semiconductor companies and system OEMs with the lowest power, smallest area solutions for high-volume products including mobile phones and other consumer electronics, networking and telecommunications equipment, and computer peripherals. For more information on Tensilica's patented, benchmark-proven processors, visit www.tensilica.com .

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Editors' Notes:

  • Tensilica and Xtensa are registered trademarks belonging to Tensilica, Inc. Xplorer is a trademark of Tensilica, Inc. Virtex is a trademark of Xilinx, Inc. All other company and product names are trademarks and/or registered trademarks of their respective owners.
  • Tensilica's announced licensees include Afa Technologies, ALPS, Aquantia, Astute Networks, Atheros, AMD (ATI), Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Brocade, Chiplen, Cisco Systems, CMC Microsystems, Conexant Systems, DS2, EE Solutions, Epson, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, iBiquity Digital, Ikanos Communications, Intel, Juniper Networks, LG Electronics, Lucid Information Technology, Marvell, MediaPhy, NEC Laboratories America, NEC Corporation, NetEffect, Neterion, Nethra Imaging, Nippon Telephone and Telegraph (NTT), NuFront, NVIDIA, Olympus Optical Co. Ltd., Penstar, Plato Networks, PnpNetwork Technologies, Server Engines, SiBEAM, Silicon Optix, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, u-Nav Microelectronics, UpZide, Valens Semiconductor, Validity Sensors, Victor Company of Japan (JVC), and XM Radio.
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“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.