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October 24, 2006

NetEffect 10Gb iWARP Ethernet Channel Adapter Employs Multiple Tensilica Xtensa Configurable Processors

SANTA CLARA, CA, – October 24, 2006 – Tensilica, Inc. today congratulated NetEffect, Inc., for the recent introduction of its 10Gb iWARP Ethernet Channel Adapter (ECA). The NE010 is the first adapter on the market that fully implements the iWARP Ethernet standards, allowing data center managers to realize full 10 Gbps throughput using existing Ethernet hardware and software. NetEffect used multiple Tensilica Xtensa configurable processors in their impressive custom chip design for this adapter.

“We selected Tensilica’s Xtensa processors because of the ease with which we were able to optimize certain functions for our high-speed, demanding Ethernet channel adapters,” stated Rick Maule, NetEffect’s CEO. “Tensilica’s automated process let us optimize our embedded processors for our exact application in a fraction of the time that it would have taken us using other alternatives.”

NetEffect’s 10Gb iWARP ECA, the NE010, implements the extensions to Ethernet created by the RDMA Consortium and IETF, which virtually eliminates host CPU computation bottlenecks and overhead associated with networking by radically improving host processor utilization. Their patented Virtual Pipeline Architecture saturates multiple bi-directional 10 Gigabit ports at a minimal packet size, delivering the full benefit of iWARP Ethernet to a wide range of applications. Additionally, it provides support for hundreds of thousands of connections.

“NetEffect’s application is a natural fit for our Xtensa configurable processors,” stated Steve Roddy, Tensilica’s vice president of marketing. “By building their high-speed data processing into multiple configured processors, NetEffect has built a highly flexible and upgradeable product.”

About NetEffect

NetEffect is a privately held network connectivity solutions company providing next generation, multi-gigabit Ethernet products. These products fully implement the iWARP extensions to the Ethernet standard as ratified by the IETF. iWARP enables Ethernet scalability to deliver high throughput for networking, fast access for storage, and low latency for clustering. NetEffect solutions can concurrently support legacy Ethernet infrastructures and the new generation of storage and clustering applications, at 10Gbps speeds. Visit www.neteffect.com for more information.

About Tensilica

Tensilica offers the broadest line of controller, CPU and specialty DSP processors on the market today, in both an off-the-shelf format via the Diamond Standard Series cores and with full designer configurability with the Xtensa processor family. Tensilica’s low-power, benchmark proven processors have been designed into high-volume products at industry leaders in the digital consumer, networking and telecommunications markets. All Tensilica processor cores are complete with a matching software development tool environment, portfolio of system simulation models, and hardware implementation tool support. For more information on Tensilica's patented approach to the creation of application-specific building blocks for SOC design, visit www.tensilica.com.

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Editors’ Notes:

  • Tensilica and Xtensa are registered trademarks belonging to Tensilica, Inc All other company and product names are trademarks and/or registered trademarks of their respective owners.
  • Tensilica’s announced licensees include Afa Technologies, ALPS, AMCC (JNI Corporation), Aquantia, Astute Networks, Atheros, ATI, Avago Technologies, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, iBiquity Digital, Ikanos Communications, LG Electronics, Lucid Information Technology, Marvell, MediaWorks, NEC Laboratories America, NEC Corporation, NetEffect, Neterion, Nethra Imaging, Nippon Telephone and Telegraph (NTT), NVIDIA, Olympus Optical Co. Ltd., PnpNetwork Technologies, sci-worx, Seiko Epson, Solid State Systems, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, u-Nav Microelectronics, Victor Company of Japan (JVC) and WiQuest Communications.
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“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.