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April 19 , 2006

Aquantia Licenses Tensilica’s Diamond Standard 108Mini for Next-Generation 10GE Over Copper Integrated Circuit

SANTA CLARA, CA, – April 19, 2006 –Tensilica, Inc. today announced that Aquantia Corp. of Milpitas, Calif., has licensed the Diamond Standard 108Mini processor core for their 10 Gigabit Ethernet physical layer transceiver chip design. Aquantia is developing chips which will enable the upcoming 10GBASE-T standard for operation over familiar UTP (Unshielded Twisted Pair) cabling.

The Diamond 108Mini is a fully synthesizable low-power 32-bit RISC CPU controller core. Although the Diamond 108Mini is smaller in die area than other 32-bit CPUs, its performance is extremely high. It is capable of handling any control-plane application where minimal die area is the most important system design parameter, although advanced debugging features are supported.

"We liked Tensilica’s Diamond 108Mini because it gave us the performance we needed in a small form factor,” stated Ramin Shirani, vice president of engineering, Aquantia. “With its small footprint and minimal power requirements, the Diamond 108Mini is well suited for general control applications."

“We are pleased that Aquantia picked our Diamond Standard 108Mini CPU over the other CPU cores on the market,” stated Steve Roddy, Tensilica’s vice president of marketing. “As an innovative company leading the emerging 10GBASE-T market, the Aquantia team is headed for success with their product design.”

About Aquantia

Aquantia is developing physical layer transceiver ICs which address challenging high-bandwidth applications, answering the call for solutions that meet the market’s requirements. Demand for 10GE in the data center is growing, with the preferred cabling solution being Unshielded Twisted Pair (UTP). The IEEE is developing the 802.3an standard for 10GE over UTP, and the market is eagerly anticipating this low-cost solution. Aquantia possesses a unique depth of experience in communications with solid backing from the venture capital community. Aquantia combines these ingredients with innovative technology to deliver solutions for the emerging 10GBASE-T market. For more information, see www.aquantia.com.

About Tensilica

Tensilica offers the broadest line of controller, CPU and specialty DSP processors on the market today, in both an off-the-shelf format via the Diamond Standard Series cores and with full designer configurability with the Xtensa processor family. Tensilica’s low-power, benchmark proven processors have been designed into high-volume products at industry leaders in the digital consumer, networking and telecommunications markets. All Tensilica processor cores are complete with a matching software development tool environment, portfolio of system simulation models, and hardware implementation tool support. For more information on Tensilica's patented approach to the creation of application-specific building blocks for SOC design, visit www.tensilica.com.

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Editors’ Notes:

  • Tensilica and Xtensa are registered trademarks belonging to Tensilica Inc. All other company and product names are trademarks and/or registered trademarks of their respective owners.
  • Tensilica’s announced licensees include ALPS, AMCC (JNI Corporation), Aquantia, Astute Networks, Atheros, ATI, Avago Technologies, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, Ikanos Communications, LG Electronics, Lucid Information Technology, Marvell, MediaWorks, NEC Laboratories America, NEC Corporation, NetEffect, Neterion, Nippon Telephone and Telegraph (NTT), NVIDIA, Olympus Optical Co. Ltd., sci-worx, Seiko Epson, Solid State Systems, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, u-Nav Microelectronics and Victor Company of Japan (JVC).
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“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.