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February 20, 2006

Global Unichip and Tensilica Announced Partnership to Present Diamond Standard Series Hard Cores for SoC Design Technologies at 0.13um and Below

Hsinchu, TAIWAN, and Santa Clara, CA – February 20, 2006 – Global Unichip Corp. (GUC) and Tensilica today announced a comprehensive partnership in which GUC will create hardened versions of Tensilica’s new Diamond Standard Series processors for TSMC foundry at technologies below 0.13um process. The hardened versions of the Diamond Standard Series processors, including low-cost 32-bit microcontroller and high-performance DSP cores for audio, video, and network processing, will become part of the GUC intellectual property (IP) library and available in the third quarter of 2006. With a global customer base, GUC has delivered leading edge SoC (system-on-chip) designs to customers throughout Greater China, Japan, Korea, North America and Europe.

“As the Diamond Standard Series are released, GUC and Tensilica present an attractive family of low-power high-performance processors that should be appealing to a wide range of our customers, from small start-ups to well established corporate giants,” stated Jim Lai, president and COO of Global Unichip Corp. “We will be able to quickly and predictably create SoC products for our customers with the hardened Diamond cores. We look forward to a close partnership with Tensilica.”

By hardening the Diamond Standard Series processors, GUC enables today’s systems and semiconductor companies to utilize TSMC’s cost-effective foundry process with minimum integration cost and reduced risks. A hardened core is a complete physical design of a processor core, already thoroughly tested and ready to be quickly dropped into an ASIC design. Designers do not have to develop the synthesis and place-and-route process required in a soft core.

“GUC will be instrumental in the widespread distribution and market acceptance of our Diamond Standard Series processor family, particularly in China where hardened cores are an ideal delivery mechanism for meeting rapid design cycle goals,” stated Chris Rowen, president and CEO of Tensilica. “We are extremely pleased to partner with GUC to provide our customers with world class design services coupled with TSMC’s best in class foundry services. This combination will be very compelling for our Diamond core customers.”

About Global Unichip Corp.

Global Unichip Corp. (GUC), a dedicated one-stop, full service SoC (System On Chip) Design Foundry, was founded in 1998 at Hsinchu Science Park, Taiwan. GUC provides total solutions from silicon-proven IPs to complex time-to-market SoC design, production, and testing services. With state of the art EDA tools, advanced methodologies, and an experienced technical team, GUC ensures the highest quality and lowest risks to achieve first silicon success. Besides, GUC delivers a one-stop turnkey solution via its partnerships with TSMC and world-class assembly and testing houses. Nowadays, GUC has established a global customer base throughout Greater China, Japan, Korea, North America, and Europe. Its track-record in complex SoC designs has brought benefits to customers in time to revenue at the lowest risk. In 2003, TSMC, the semiconductor foundry leader, became the primary shareholder. With the close partnership with TSMC, GUC is further committed to presenting the most advanced and the best price-performance solutions. For more information, please visit http://www.globalunichip.com.

About Tensilica

Tensilica offers the broadest line of controller, CPU and specialty DSP processors on the market today, in both an off-the-shelf format via the Diamond Standard Series cores and with full designer configurability with the Xtensa processor family. Tensilica’s low-power, benchmark proven processors have been designed into high-volume products at industry leaders in the digital consumer, networking and telecommunications markets. All Tensilica processor cores are complete with a matching software development tool environment, portfolio of system simulation models, and hardware implementation tool support. For more information on Tensilica's patented approach to the creation of application-specific building blocks for SOC design, visit www.tensilica.com.

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Editors’ Notes:

  • Tensilica and Xtensa are registered trademarks belonging to Tensilica, Inc. Blast Fusion and Magma and are registered trademarks, and Blast Create and “The Fastest Path from RTL to Silicon” are trademarks of Magma Design Automation Inc. All other company and product names are trademarks and/or registered trademarks of their respective owners.
  • Tensilica’s announced licensees include ALPS, AMCC (JNI Corporation), Astute Networks, Atheros, ATI, Avago Technologies, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, Ikanos Communications, LG Electronics, Marvell, NEC Laboratories America, NEC Corporation, NetEffect, Neterion, Nippon Telephone and Telegraph (NTT), NVIDIA, Olympus Corporation, sci-worx, Seiko Epson, Solid State Systems, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, u-Nav Microelectronics and Victor Company of Japan (JVC).
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“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.