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February 20, 2006

EVE to Provide Hardware-Assisted Verification Platform for Tensilica’s Diamond Standard Processor Family

SAN JOSE and SANTA CLARA, Calif. –– February 20, 2006 –– EVE and Tensilica, Inc., today announced that Tensilica’s new Diamond Standard family of processor cores will be made available pre-programmed into EVE’s hardware-assisted verification platform to offer a fast prototyping vehicle to generate embedded software for system-on-chip (SoC) design.

Tensilica customers can purchase EVE’s ZeBu-Diamond that includes a single Xilinx Virtex 4 field programmable gate array (FPGA) pre-loaded with one of Tensilica’s Diamond cores. The debugger in Xtensa Xplorer, Tensilica’s integrated development environment, is linked to ZeBu-Diamond to provide hardware/software co-verification and to dramatically accelerate overall SoC verification and debugging. The combination of EVE’s automatic compiler technology for mapping SoCs to FPGAs and Tensilica’s high-performance Diamond Standard processors ensures that design teams will have access to a unified hardware system debug and software validation environment.

“Combining Tensilica’s Diamond family with the latest-generation ZeBu will give software programmers a much-needed head start in generating embedded software,” says Lauro Rizzatti, worldwide marketing vice president and general manager of EVE-USA. “Our relationship with Tensilica is long standing and successful, and we are pleased to be a preferred emulation platform partner for the Diamond Standard series of processors. We believe this product combination will be very successful.”

“Product teams want to start software development as early in the design cycle as possible”, stated Steve Roddy, Tensilica’s vice president of marketing. “We highly recommend EVE’s ZeBu Diamond platform for customers of our high-performance Diamond Standard Processors.”

Pricing and Availability

EVE is the preferred supplier of fast prototyping products for the Tensilica Diamond Standard family of processor cores. ZeBu-Diamond is available from EVE and is shipping now at $15,000 per board.
For more information, contact Lauro Rizzatti. He can be reached at (408) 881-0440 or via email at lauro@eve-team.com. More details can be found at the EVE website located at: http://www.eve-team.com.

About EVE

EVE offers the fastest verification and most cycles per dollar by combining the best aspects of traditional emulation and rapid prototyping systems into a single, unified environment for ASIC and SoC debugging, and embedded software validation. Its headquarters in the United States is San Jose, Calif. Telephone: (408) 881-0440. Fax: (408) 904-5800. Its corporate headquarters is located in Palaiseau, France. Telephone: (33) 1 64.53.27.30. Fax: (33) 1 64.53.27.40. Email: info@eve-team.com. Website: http://www.eve-team.com.

About Tensilica

Tensilica offers the broadest line of controller, CPU and specialty DSP processors on the market today, in both an off-the-shelf format via the Diamond Standard Series cores and with full designer configurability with the Xtensa processor family. Tensilica’s low-power, benchmark proven processors have been designed into high-volume products at industry leaders in the digital consumer, networking and telecommunications markets. All Tensilica processor cores are complete with a matching software development tool environment, portfolio of system simulation models, and hardware implementation tool support. For more information on Tensilica's patented approach to the creation of application-specific building blocks for SOC design, visit www.tensilica.com.

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Editors’ Notes:

  • Tensilica and Xtensa are registered trademarks belonging to Tensilica Inc. All other company and product names are trademarks and/or registered trademarks of their respective owners.
  • Tensilica’s announced licensees include Agilent, ALPS, AMCC (JNI Corporation), Astute Networks, Atheros, ATI, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, Ikanos Communications, LG Electronics, Marvell, MediaWorks, NEC Laboratories America, NEC Corporation, NetEffect, Neterion, Nippon Telephone and Telegraph (NTT), NVIDIA, Olympus Optical Co. Ltd., sci-worx, Seiko Epson, Solid State Systems, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, u-Nav Microelectronics, and Victor Company of Japan (JVC).
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“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.