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August 29, 2005

Tensilica Announces Fastest 90nm Licensable Processor Core

Xtensa Processors Also Provide Low-Power Advantage

Santa Clara, Calif. – August 29, 2005 – Tensilica®, Inc., today announced that its Xtensa processors have been proven in 90nm design flows to reach the highest clock rate of any licensable 32-bit processors available, reaching over 600 MHz in commercially available, high-performance foundry process technology and up to 700 MHz from Tensilica’s value-added silicon partners, such as STMicroelectronics.

Not only is the Xtensa LX processor the highest performance licensable processor core, but its superior architecture provides better performance on a per-MHz basis on the basic architecture with no configuration extensions. With customization, the Xtensa LX can provide an order of magnitude better performance. And the Xtensa LX processor consistently achieves lower power scores than other 32-bit processors.

“These outstanding results prove that our basic Xtensa architecture is a superior platform for embedded applications, compared to the vintage RISC architectures originally designed for 1980’s desktops,” stated Chris Rowen, Tensilica’s president and CEO. “With the performance we can provide in 90nm flows, Xtensa processors are the best choice for both control tasks and compute-intensive applications requiring the further performance advantage of configurability and extensibility.”

Outstanding Performance Results

Xtensa LX reaches the highest clock rate published to date of any licensable 32-bit processor in 90nm technology. STMicroelectronics has fabricated and tested a 5-pipeline stage implementation of the Xtensa V processor that runs at 500 MHz. When STMicroelectronics simulated a design expected to go into fabrication in a couple of months using a 7-stage implementation of the Xtensa LX processor, they achieved 700 MHz in their 90nm technology.

For a standard COT (customer-owned tools) design flow using TSMC’s 90GT high-performance process, the Xtensa LX processor achieved the following results:

Xtensa LX Configuration Frequency1 (Worst Case) Core Area2 (Sq. mm)
Minimum area 500 0.118
Base 5-stage 5903 0.185
Base 7-stage 655 0.224

1 – 3D extracted, post-layout timing
2 – Actual layout
3 – Assumes memory access time is 1.012 ns

Lowest Power

Many consumer SOC applications require the lowest possible power requirements for long-lasting battery life. While power varies dramatically with various process technologies, Xtensa processors consistently get outstanding results. This is why Xtensa processors are being designed into so many new cellular phone applications. The following chart shows some sample results.

Process Technology Xtensa LX Configuration Power (mW/MHz) Static Leakage (mW)
TSMC 90GT High Performance Minimum area 0.048 1.01
Base 5-stage 0.059 1.90
TSMC 90G Standard Process Minimum area 0.032 0.186
Base 5-stage 0.034 0.262

Superior Architecture

In addition to offering the highest available clock rates, the superior Xtensa processor architecture provides better performance than any other licensable 32-bit processor core on a per-MHz basis, even with no configuration extensions, as demonstrated in the EEMBC benchmarks below. (Note: All EEMBC benchmark scores are on a per-MHz basis and normalized to ARM 1026EJ-S = 1.0. Also, Tensilica scores are for the Xtensa V and Xtensa LX processors.)

  Consumer Networking Office Automation Telecom
ARM 1026EJ-S 1 1 1 1
MIPS 20Kc 1.08 1.10 1.17 1.41
Xtensa without custom instructions 1.18 1.80 1.30 2.51

With customization, the Xtensa processors can provide an order of magnitude better performance, as demonstrated in the EEMBC benchmarks below.

  Consumer Networking Office Automation Telecom
ARM 1026EJ-S 1 1 1 1
MIPS 20Kc 1.08 1.10 1.17 1.41
Xtensa Optimized with Custom Instructions 27.54 7.42 5.52 38.08

ECL - EEMBC Certification Laboratories

About Tensilica

Tensilica was founded in July 1997 to address the growing need for optimized, application-specific microprocessor solutions in high-volume embedded applications. With a configurable and extensible microprocessor core called Xtensa, Tensilica is the only company that has automated and patented the time-consuming process of generating a customized microprocessor core along with a complete software development tool environment, producing new configurations in a matter of hours. For more information, visit www.tensilica.com.

# # #

Editors’ Notes:

  • Tensilica and Xtensa are registered trademarks belonging to Tensilica, Inc. All other company and product names are trademarks and/or registered trademarks of their respective owners.
  • Tensilica’s announced licensees include Agilent, ALPS, AMCC (JNI Corporation), Astute Networks, ATI, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, Ikanos Communications, LG Electronics, Marvell, NEC Laboratories America, NEC Corporation, NetEffect, Neterion, Nippon Telephone and Telegraph (NTT), NVIDIA, Olympus Optical Co. Ltd., sci-worx, Seiko Epson, Solid State Systems, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, and Victor Company of Japan (JVC).
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“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.