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March 7, 2005

Tensilica Teams with Magellan Discovery For Taiwan Market Expansion

SANTA CLARA, CA - March 7, 2005 - Tensilica , Inc., today announced that it is working with Magellan Discovery Corporation in Taiwan. Magellan will provide sales, design and technical support for Tensilica's Xtensa processors, recipient of the 2004 Microprocessor Report Analysts' Choice Award for Best Intellectual-Property (IP) Core for system-on-chip (SOC) design (see release dated January 24, 2005 at http://www.tensilica.com/html/pr_2005_01_24a.html ) .

"Magellan brings a comprehensive sales and support package for the Taiwan market that will help us meet the growing requirements for SOC design in this important region of the world," stated Chris Rowen, president and CEO of Tensilica. "In particular, their FPGA prototyping service will be of great interest to potential Tensilica customers interested in evaluating the benefits of our configurable, extensible processors, which significantly cut overall design and verification time."

Magellan has a highly seasoned sales and technical team that can meet the needs of the EDA and semiconductor industry. Magellan Discovery provides a one-stop shop service to business partners for the Taiwan market. With their unique business model and strong connections on both sides of the Pacific, Magellan is able to bridge the gap between innovative technology and the Asian ecosystem.

"We are excited about working closely with Tensilica and helping them reach more SOC designers in Taiwan," stated Stone Peng, CEO and president, Magellan Discovery. "The case for Tensilica's proven technology is clear - Tensilica's processors can be customized to be used instead of RTL blocks in SOC designs, adding valuable programmability and flexibility while cutting overall design time."

Magellan's headquarters in Taiwan is at 8F, No. 413, Rueiguang Rd., Neihu District, Taipei 114, Taiwan ROC. The phone number is +866.2.8751.0388 and their web site is www.magellandiscovery.com .

Magellan provides a strong complement to Tensilica's existing presence in Asia, which includes its sales and support headquarters in Taiwan and a sales office in Beijing, China, as well as representation by Regulus Technologies Co., Ltd. for the Taiwan market.

About Tensilica

Tensilica was founded in July 1997 to address the growing need for optimized, application-specific processor solutions in high-volume embedded applications. With a configurable and extensible processor core called Xtensa, Tensilica is the only company that has automated and patented the time-consuming process of generating a customized processor core along with a complete software development tool environment, producing new configurations in a matter of hours. For more information, visit www.tensilica.com .

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Editors' Notes:

  • Tensilica and Xtensa are registered trademarks belonging to Tensilica Inc. NVIDIA is a registered trademark of NVIDIA Corporation. All other company and product names are trademarks and/or registered trademarks of their respective owners.
  • Tensilica's announced licensees include Agilent, ALPS, AMCC (JNI Corporation), Astute Networks, ATI, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, Ikanos Communications, LG Electronics, Marvell, NEC Laboratories America, NEC Corporation, NetEffect, Neterion, Nippon Telephone and Telegraph (NTT), NVIDIA, Olympus Optical Co. Ltd., Seiko Epson, Solid State Systems, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, and Victor Company of Japan (JVC)
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Portable Design 2006 Editor's  Choice Award
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“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.