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June 7, 2004

Prentice Hall Publishes New Book by Tensilica CEO Chris Rowen

“Engineering the Complex SOC” Describes a Step-by-Step Approach to Using Multiple Configurable Processors as An Alternative to Complex, Hand-Coded RTL

SANTA CLARA, Calif. – June 7, 2004 – In a new book titled, “Engineering the Complex SOC: Fast, Flexible Design with Configurable Processors,” author Chris Rowen, CEO of Tensilica®, Inc., and editor Steve Leibson, Tensilica’s Technology Evangelist, describe an emerging system-on-chip (SOC) design methodology that allows chip designers to finish larger projects in much less time, with higher quality results. This book is part of the Modern Semiconductor Design Series and is available through Prentice Hall PTR (Professional Technical Reference) on the Internet at http://www.phptr.com/title/0131455370.

This book targets two groups of readers: senior managers wishing to understand and control the strategic and economic challenges of SOC design investment; and senior architects, engineers, and embedded software developers working to exploit the potential of faster, more creative and more reliable SOC design.

Engineering the Complex SOC outlines the major forces changing the semiconductor design process and introduces the concept of using configurable, extensible processors as basic building blocks, rather than using complex and costly hand-coded RTL. It lays out a systematic, proven SOC design methodology. It introduces the key concepts and techniques of processor configuration, extension, hardware/software co-generation and multiple processor partitioning and communication. The book uses real-world illustrations extensively, both in the form of case studies about architecture decisions and in short examples that communicate the flavor and the power of these methods.

“The decision to publish Chris Rowen’s book was an easy one,” said Bernard Goodwin, Publisher, Prentice Hall PTR (Professional Technical Reference). “We were impressed by the reaction of our team of reviewers who confirmed our belief that the book provides cutting-edge, useful information on a hot topic. We expect Engineering The Complex SOC to be one of our best selling publications.” Engineering the Complex SOC is part of Prentice Hall’s popular Modern Semiconductor Design Series.

“The goal of this book was to clearly document an efficient new way to design integrated circuits – one that is already being broadly adopted by the industry and radically changing the way companies approach chip design,” stated Rowen. “The book helps designers learn an alternative design approach to the risky, tedious and time-consuming process of describing hardware using error-prone design languages like Verilog and VHDL – until now, the predominant method for designing custom semiconductors. It’s much easier, faster and more reliable to use processors that can simply be configured and programmed for virtually any task.”

The book includes forewords from Dr. Clayton Christenson, professor at the Harvard Business School and leading author on “disruptive technology”, and Dr. John Hennessy, President of Stanford University and renowned microprocessor expert.

The book has a list price of $89.00 and is available at http://www.phptr.com/title/0131455370.

About Tensilica

Tensilica was founded in July 1997 to address the growing need for optimized, application-specific microprocessors for high-volume embedded applications. With the Xtensa and Xtensa LX configurable and extensible microprocessor cores, Tensilica is the only company that has automated and patented the time-consuming process of generating a customized microprocessor core along with a complete software-development tool environment, producing new configurations in a matter of hours. These customized processors rival hand-coded RTL in performance and add a needed level of programmability. For more information, visit www.tensilica.com.

# # #

Editors’ Notes:

  • Tensilica and Xtensa are registered trademarks belonging to Tensilica Inc.
  • Tensilica’s announced licensees include Agilent, ALPS, AMCC (JNI Corporation), Astute Networks, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, Ikanos Communications, LG Electronics, Marvell, MediaWorks, NEC Laboratories America, NEC Corporation, Nippon Telephone and Telegraph (NTT), Olympus Optical Co. Ltd., S2io, Solid State Systems, Sony, STMicroelectronics, Stretch Inc.,TranSwitch Corporation, and Victor Company of Japan (JVC).
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“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.