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May 25, 2004

IP Provider Virage Logic Teams with Tensilica to Offer Embedded Memory Generator Integrated with Tensilica’s Xtensa Configurable Processor Generator

SOC Designers Can Easily Choose Memory IP to Match Their Xtensa Configuration

SANTA CLARA and FREMONT, Calif. – May 24, 2004 – SOC (system-on-chip) designers can now quickly evaluate and select the optimal embedded memory intellectual property (IP) for their Tensilica Xtensa processor configurations using a new web-based portal interface. Created by Virage Logic Corporation (Nasdaq:VIRL), a leading provider of best-in-class semiconductor IP platforms, the IP web portal is accessible from Tensilica’s Xtensa Processor Generator on the Tensilica web site.

With the IP web portal, Xtensa designers can generate memories and download area, speed and power data for all of their memory configurations, thus optimizing their processor designs according to their performance requirements. Using pull-down menu options, SOC designers can easily choose from a variety of memory types for various foundries and process technologies.

“The demand for high-performance memory IP continues to grow at a rapid rate as more and more programmable functionality is built into SOC designs,” stated Jim Ensell, vice president of marketing for Virage Logic. “With the Tensilica and Virage Logic web-based portal, designers can now quickly evaluate and select the best memory for their processor configuration.”

“The right memory choice is important in getting the performance needed from processor-based SOC design,” according to Bernie Rosenthal, senior vice president of marketing and sales for Tensilica. “Virage Logic’s memory portal makes it much faster and easier for the design teams to do the performance trade-off analysis necessary to select the optimal memories for their designs.”

Availability

The Virage Logic memory portal is available now to Xtensa users through Tensilica’s Configurable Process Generator located at https://www1.tensilica.com/login/gen/ten4genlogin.html. SOC designers can configure memories as required for their design and manufacturing purposes, such as: foundry, process technology, type of memory, and preference for high-speed, high-density or ultra-low-power operation.

About Tensilica

Tensilica was founded in July 1997 to address the growing need for optimized, application-specific microprocessor solutions in high-volume embedded applications. With a configurable and extensible microprocessor core called Xtensa, Tensilica is the only company that has automated and patented the time-consuming process of generating a customized microprocessor core along with a complete software development tool environment, producing new configurations in a matter of hours. For more information, visit www.tensilica.com.

About Virage Logic

Virage Logic Corporation (Nasdaq:VIRL) is a leading provider of best-in-class semiconductor IP platforms based on memory, logic, I/Os, and IP development tools that are silicon-proven and production ready. Virage Logic meets market demands for cost reduction, while improving performance and reliability for fabless and integrated device manufacturer (IDM) companies focused on the consumer, communications and networking, handheld and portable, and computer and graphics markets. Virage Logic is headquartered in Fremont, California and has sales and support offices worldwide. For more information, visit www.viragelogic.com or call (877) 360-6690 toll free or (510) 360-8000.

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SAFE HARBOR STATEMENT FOR VIRAGE LOGIC UNDER THE PRIVATE SECURITIES LITIGATION REFORM ACT OF 1995:

Statements made in this news release other than statements of historical fact are forward-looking statements, including, for example, statements relating to Virage Logic's business outlook, new products and new relationships. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic's ability to maintain and develop new relationships with third-party foundries, adoption of technologies by semiconductor companies and increases in the demand for their products, the company's ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies, the company's ability to obtain royalty revenues from customers in addition to license fees, business and economic conditions generally and in the semiconductor industry in particular, competition in the market for embedded memories and other risks including those described in the Company's Annual Report on Form 10-K for the period ended September 30, 2002, filed with the Securities and Exchange Commission (SEC) on December 16, 2002, and in Virage Logic's other periodic reports filed with the SEC, all of which are available from Virage Logic or from the SEC's website (www.sec.gov), and in press releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.

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Editors’ Notes:

  • Tensilica, Xtensa and Xtensions Network are registered trademarks belonging to Tensilica Inc.
  • All trademarks and copyrights are property of their respective owners and are protected therein
  • Tensilica’s announced licensees include Agilent, AMCC (JNI Corporation), Astute Networks, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, Crimson Microsystems, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, Ikanos Communications, LG Electronics, Marvell, MediaWorks, NEC Laboratories America, NEC Corporation, Nippon Telephone and Telegraph (NTT), Olympus Optical Co. Ltd., S2io, Solid State Systems, Sony, STMicroelectronics, TranSwitch Corporation, and Victor Company of Japan (JVC).
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“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.