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September 15, 2003

Tensilica Introduces 24-bit Xtensa HiFi Audio Engine; Speeds Addition of Audio Support to Chip Designs

Offers Turnkey Package for Multiple Audio and Speech Standards

SANTA CLARA, Calif., Sept.15, 2003 – Tensilica, Inc., today announced immediate availability of its 24-bit Xtensa HiFi Audio Engine and ten audio encoders and decoders. The Xtensa HiFi Audio Engine, a transformative add-on package for Tensilica’s proven Xtensa processor, provides a turnkey solution for system-on-chip (SOC) designers wanting to quickly add high-quality and proven audio capabilities to products such as cell phones, digital cameras, camcorders, car audio, home entertainment systems, set-top boxes, and consumer audio players.

“The Xtensa HiFi Audio Engine let us quickly design in high-quality audio at a low cost.” Stated Jeffrey Lin, President of Solid State Systems of Taiwan. “We’re using it to speed the integration of audio in an upcoming product.”

Because the Xtensa HiFi Audio Engine is a 24-bit embedded audio processor, it has inherent advantages over the industry standard 16-bit audio processors in use today. It can provide superior sound quality of compressed files due to the increased precision available for intermediate calculations in the compression and decompression algorithms.

The Xtensa HiFi Audio Engine currently supports the following standards: Dolby Digital AC-3 decode, Dolby Digital AC-3 consumer encode, MP3 decode, MP3 encode, MPEG-2 AAC decode, MPEG-4 AAC decode, MPEG-4 AAC encode, and WMA decode. It also supports G.723-1 and G.729AB speech codecs for highly optimized, multi-standard, voice-over-IP (VoIP) SOC designs. Because the engine is programmable, multiple standards can run on the same hardware, allowing the same silicon to be used for multiple applications or the same device to play or record audio encoded in different standards. In addition, designers can further customize the underlying Xtensa processor so it can be used for other functions on the chip.

Audio Chip Market Ready for Strong Growth

According to a report by Forward Concepts, total audio chip revenues reached $2.5 billion in 2002 and are forecasted to grow at a 22% compound annual rate to $6.8 billion by the year 2007. Will Strauss, president of Forward Concepts, said, “The consumer market will continue to be the fastest growing segment constituting almost 92% of the audio chip market by 2007. Therefore, there will be a great opportunity for IP providers to furnish chip designers with turnkey audio solutions that can be quickly and cost-effectively integrated into new chip designs.”

“Support of digital audio standards is now a ‘must have’ for a wide variety of consumer products,” stated Bernie Rosenthal, Tensilica’s Senior Vice President of Marketing and Sales. “Now designers can quickly add standard audio functions to their SOCs with the Xtensa HiFi Audio Engine. At the same time, they can further configure and add instructions to the Xtensa processor to achieve even more product differentiation.”

Ten Audio Packages

All ten of the 24-bit audio packages for the Xtensa HiFi Audio Engine include optimized C and assembly source code, a binary compiled version of that software, TIE (Tensilica Instruction Extension) source code for the instruction extensions used by the package, and documentation that describes how to incorporate the package into a system implementation. By using these packages, these functions can be integrated into an SOC without the need for additional optimizations or software development.

  • Dolby Digital AC-3 decoder: implements the complete Dolby Digital AC-3 audio decoder with a 24-bit MAC for superior audio fidelity.
  • Dolby Digital AC-3 Consumer encoder: implements the consumer version of the Dolby Digital encoder, supporting 1- and 2-channel encoding over the full range of bit and sample rates.
  • G.723-1 codec: implements ITU-T G723-1 speech coding and decoding for voice-over-IP applications.
  • G.729AB codec: implements ITU-T G729AB speech coding and decoding for voice-over-IP applications.
  • MP3 decoder: implements 24-bit MPEG-1, MPEG-2 and MPEG-2.5 (extensions of MPEG-1) layer 1/2/3 (MP3) decoding with support for constant bit rate, variable bit rate, and free formats. Also, it is fully compliant with ISO/IEC 11172-4.
  • MP3 encoder: implements 24-bit MPEG-1, MPEG-2 and MPEG-2.5 (extensions of MPEG-1) layer 1/2/3 encoding with support for joint stereo coding for better efficiency and support for constant bit rate, variable bit rate, and free formats.
  • MPEG-2 AAC decoder: implements 24-bit MPEG-2 AAC decoding with full support for two-channel, low-complexity AAC data streams; ADIF and ADTS data streams; AAC streams without headers; and two main audio channels in low-complexity multi-channel AAC data streams. It is fully compliant with ISO/IEC 13818-4.
  • MPEG-4 AAC decoder: implements 24-bit MPEG-4 AAC with full support for MPEG-4 AAC low-complexity multi-channel files; MPEG-4 file format data streams; and ADIF, ADTS, MPEG-2/MPEG-4 headerless data streams. It is fully compliant with ISO/IEC 14496-4.
  • MPEG-4 AAC encoder: supports MPEG-4 AAC and MPEG 2 AAC MAIN, LC, SSR, and LTP 2-channel encoding and is fully compliant with ISO/IEC 14496-4.
  • WMA decoder: supports decoding of high-, mid-, and low-rate WMA data streams and ASF (Advanced Streaming Format) data streams. It is fully compliant with Microsoft WMA test specifications.

Optimized for Audio Performance and Quality

All audio packages have been fully optimized to take advantage of Tensilica’s industry leading microprocessor performance (as proven on EEMBC benchmarks, see http://www.tensilica.com/html/eembc_optimized.html). All were designed to minimize the amount of external ROM and RAM required, making them ideal for low-cost, battery driven applications. The entire Xtensa audio solution (Xtensa processor plus Xtensa HiFi Audio Engine) consumes only about 100,000 gates, which represents a small portion of today’s multi-million gate SOC designs.

The Xtensa HiFi Audio Engine consists of one set of optimized TIE (Tensilica Instruction Extension) language extensions for the Xtensa processor. This audio engine can run any or all of the supported audio functions. The SOC designer can add additional TIE instructions to further customize the design. Then the designer uses the Xtensa Processor Generator to create a custom core that integrates the Xtensa HiFi Audio Engine and any other instructions. In about an hour, the Xtensa Processor Generator automatically builds a correct-by-construction RTL (register transfer level) description of the Xtensa processor that includes all the newly described functions and resources, as well as a complete software tool suite that incorporates the new TIE instructions, registers, and data types. Because the processor and software development tool suite are generated from one source description and a common database, the software development tools track the processor hardware and there is no possibility of a mismatch. This significantly speeds the development effort.

Development Partner – CuTe Solutions

All the algorithm solutions including the TIE instructions were designed and developed by CuTe Solutions. “CuTe Solutions’ strengths lie in better understanding of the critical portions of the algorithms and hence we can develop efficient solutions by effectively balancing megahertz and memory requirements. In this case, we have been able to create special TIE instructions to optimize performance of the Xtensa configurable processor,” stated Dr. Nagarajan, Managing Director of CuTe Solutions.

“Utilizing fully our internal ASIC Design resources, we developed the Xtensa Audio Solutions SoC Platform and Reference Board for validating and demonstrating the real-time performance of these audio and voice codecs,” added Ms. Volety Padmavathi, CuTe Solutions’ Director for audio solutions development. “This board is an ideal platform for demonstrating the capabilities and flexibility of the Xtensa HiFi Audio Engine."

Pricing and Availability

Pricing for the Xtensa HiFi Audio Engine and one encoder or decoder is as low as $50,000 and requires an Xtensa processor license. The engine and the software for all ten of the audio packages are available now.

About Tensilica

Tensilica was founded in July 1997 to address the growing need for optimized, application-specific microprocessor solutions in high-volume embedded applications. With a configurable and extensible microprocessor core called Xtensa, Tensilica is the only company that has automated and patented the time-consuming process of generating a customized microprocessor core along with a complete software development tool environment, producing new configurations in a matter of hours. For more information, visit www.tensilica.com.

About CuTe Solutions

CuTe Solutions Private Ltd., is a high technology solutions provider founded in 1997 in Hyderabad, India and has its sales and marketing channel through its USA subsidiary CuTe Solutions, Inc. CuTe Solutions is focused on real-time DSP applications for audio/speech processing and Voice Over IP Protocols based on RISC/DSP combination. CuTe Solutions has a dedicated ASIC Design team that designs and develops DSP/Xtensa Processor based SoC platforms catering to audio and voice applications. The company has expertise in fixed-point and floating-point DSP software, embedded application development including video solutions development. For more information, visit www.cutesolinc.com.

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Editors’ Notes:

  • “Tensilica” and “Xtensa” are registered trademarks belonging to Tensilica Inc. All other trademarks are the property of their respective holders.
  • Tensilica’s announced licensees are Agilent, Astute Networks, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, IC4IC, Ikanos Communications, JNI Corporation, Marvell, Mindspeed Technologies, National Semiconductor, NEC Laboratories America, NEC Corporation, Nippon Telephone and Telegraph (NTT), Olympus Optical Co. Ltd., ONEX Communications, OptiX Networks, Osaka & Kyoto Universities, S2io, Sony, Solid State Systems (3S), STMicroelectronics, TranSwitch Corporation, Trebia Networks, Victor Company of Japan (JVC) and ZiLOG.
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“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.