Tensilica’s Xtensa First Processor Core Certified by EEMBC

Extraordinary Power of Configurable Processors Confirmed by Independent Lab Results

Nuremberg, Germany, February 14,

2001 ... Tensilica Inc., the Santa Clara, California (USA) provider of configurable processor technology, announced today at Embedded Systems 2001 that the company’s Xtensa III processor has become the first core technology to achieve certification by EEMBC, the embedded microprocessor benchmark consortium.

Chris Rowen, Tensilica’s president and CEO, said, “Not only are we pleased to be able to provide meaningful and objective third party data about our Xtensa processor technology, but also we’re thrilled to have the Xtensa architecture be the first processor core to be EEMBC certified. These data confirm what our existing licensees already know: Tensilica technology can deliver orders of magnitude performance improvements when compared to fixed processor implementations.”

The Process

Tensilica engaged in a two-step certification process for its IP cores. The first involved benchmarking the basic Xtensa configuration – the “out-of-the-box” score.

The second step — designed to illustrate the significant improvements obtainable by the addition to the base processor of designer-configured custom instructions — involved tuning the default configuration through an iterative process using the company’s proprietary Tensilica Instruction Extension (“TIE”) compiler. Tensilica created three application-specific configurations — one each for EEMBC’s consumer, networking and telecommunications benchmarks — using the same methods customers routinely use to tune Xtensa processors for their designs. Each configuration ran at 200 MHz, and targeted 0.18-micron technology.

In the telecom benchmark series, the final core was configured with an added Vectra™ DSP Engine to illustrate the performance gains possible through preconfigured add–ons. EEMBC describes the process of optimizing results for its benchmarks “the achievement of full fury results.”

In order to make the benchmarking even more meaningful to potential Xtensa processor designers, Tensilica engaged a graduate student to perform the initial and fine tuning of all the device configurations to be certified, mimicking the learning curve typical for a new Tensilica user. The student received a three-day course of instruction before starting, the same basic training offered to all Tensilica customers. Prior to this assignment the student had no direct experience in microprocessor design.

Total Time

The total elapsed time spent optimizing three separate instances of the processor for all 11 benchmarks, including C-code optimization, was only 10 weeks.

Results

The differences between the “out-of-the-box” core and “full fury” results were significant. They ranged from a 4X speed improvement after TIE configuration for the “Packetflow” algorithm in the Networking suite to an amazing speed improvement of 830X for the “Convolutional Encoder” algorithm of the Telecommunications suite.

Networking Benchmark Suite Highlights

• 2.2X performance speedup (Netmark™), 3% reduction in code size

Telecommunications Benchmark Suite Highlights

• 37X performance speedup (Telemark™)

Consumer Benchmark Suite Highlights

• 17X performance increase (Consumermark™) with 18% reduction in code size (average improvement across the individual tests in the benchmark suite)

After the designs were configured, they were reconstructed at EEMBC’s Austin Laboratories under the direction of Alan R. Weiss, Chairman and CTO, EEMBC Certification Laboratories, LLC (ECL). According to Weiss, “We were a bit stunned at the difference in results between a standard core produced using simple calls on Tensilica’s internet GUI and the optimized version of the same basic design created through added custom instructions or use of one of Xtensa’s preconfigured add-ons like the Vectra™ DSP Engine. The major improvements say a lot about this technology’s tools.”

“The certified benchmark scores that Tensilica is publishing today are exemplary of the objectives for which EEMBC was founded,” said Markus Levy, EEMBC President. “Tensilica is not only the first of the processor core vendors to undergo the certification process, this event also highlights EEMBC’s commitment to bringing relevance to embedded processor benchmarking. These benchmarks will help customers make objective choices between processor types.”

Benchmark Details

Complete benchmark data on Tensilica’s Xtensa Core – as well as data on other EEMBC certified processors may be obtained by visiting the EEMBC website, www.eembc.org. The web site presentation facilitates the comparison of various microprocessors with Tensilica’s results. The Tensilica benchmarks are also available on the company’s website, www.tensilica.com.

About EEMBC

Providing the embedded industry fair and certified benchmarks and real-world applications, EEMBC is composed of more than 40 of the world's leading and most influential semiconductor and intellectual property companies. EEMBC members are committed to helping customers get product easier and faster through fair benchmarking and establishment of industry standards. Benchmarking fairness is provided through the EEMBC Certification Labs with offices in Texas and California. Certified benchmarking results are posted on the EEMBC website at http://www.eembc.org/benchmark.

About Tensilica

Tensilica was founded in July 1997 to address the fast-growing market for configurable microprocessor cores and software development tools for high volume, embedded systems. Using the company's proprietary Xtensa Processor Generator, system-on-chip (SOC) designers can develop a processor subsystem hardware design and a complete software development tool environment tailored to their specific requirements in hours.

Tensilica's solutions provide a proven, easy-to-use, methodology that enables designers to achieve optimum application performance in minimum design time. The Company is engaged in research, development, and customer support from its offices in Santa Clara, California; Burlington, Massachusetts; Princeton, NJ; Houston, Texas; Oxford, U.K.; Yokohama, Japan; and Stockholm, Sweden.

Tensilica is headquartered in Santa Clara, California (95054) at 3255-6 Scott Boulevard, and can be reached at (408) 986-8000 or via www.tensilica.com on the World Wide Web.

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Editors' Notes

"Tensilica" is a registered trademark and "Xtensa" and “Vectra” are trademarks belonging to Tensilica Inc.

Tensilica’s announced licensees are, in alphabetical order, Berkeley Wireless Research Center, Cisco Systems, Fujitsu Limited, Galileo Technology, National Semiconductor, NEC Corporation, NTT, ONEX Communications, TranSwitch Corporation and ZiLOG

Visit Tensilica at ESC-Nuremberg, Booth Number L-15, Hall 12, February 14 - 16, 2001, Messe Nürnberg, Germany.

Visit Tensilica at DATE 2001, Munich, Booth Number B-1, March 13 – 15, 2001, International Congress Centre, München, Germany.

Visit Tensilica at Embedded Systems Conference - Spring, Booth Number 2502, April 9 - 13, 2001, Moscone Convention Center, San Francisco.

The EDN Embedded Microprocessor Benchmark Consortium (EEMBC) was formed in April 1997 to develop meaningful performance benchmarks for processors in embedded applications. Unlike the embedded processor benchmarks of yesterday, EEMBC's benchmarks comprise a suite designed to reflect real-world applications. Furthermore, EEMBC is backed by the majority of the processor industry and has therefore established itself as the industry-standard, embedded processor benchmarks. They represent a hybrid of real-world and synthetic benchmarks. These benchmarks target the automotive/industrial, consumer, networking, office automation, and telecommunications markets. More specifically, these benchmarks target specific applications that include engine control, digital cameras, printers, cellular phones, modems, and more. And with the assistance of a number of industry experts, the consortium dissected these applications and derived 37 individual algorithms that would constitute EEMBC's Version 1.0 suite of benchmarks.

EEMBC members include Altera, AMD, ARC, ARM, Analog Devices Inc., ATI Technologies, BOPS, Cadence, Conexant Systems, DSP Group, Equator Technologies, FlexSilicon, Fujitsu Microelectronics, Green Hills Software, Hitachi America Ltd., Improv Systems, IBM Corporation, Imsys, Infineon Technologies, Integrated Device Technology, Intel, Lucent, Metaware, Metrowerks, Microchip Technology, MIPS Technologies Inc., Mitsubishi, Motorola, National Semiconductor, NEC, Panasonic, Philips, QED, SandCraft, STMicroelectronics, Siroyan Ltd., Sun Microsystems, 3DSP, Tensilica, Texas Instruments, Toshiba, Transmeta, Trimedia, and Wind River (DIAB).