Tensilica's Xtensa Processor Core Proven in Silicon

Santa Clara, Calif., May 25, 1999 .Tensilica Inc., a leader in the emerging market for application-specific processor technology, today disclosed that it has completed verification of a configured instance of it's Xtensa processor core built using TSMC's 0.25-micron CMOS process.  According to the company, the 32- bit processor core with integrated 8Kbyte instruction and data caches runs at over 200 MHz and measures only 3.4-sq. mm.

Chris Rowen, Tensilica's president and CEO, said, "This is a significant milestone.  Success defined by first time correctness and the targeted at-speed operation on a complex design using a standard, commercial, ASIC or COT flow is still somewhat of a rarity in today's environment.  It is a testament to the accuracy and robustness of our design and verification flows as well as the quality of the partner tools and libraries we used to prove our design."

Speaking for TSMC (NYSE: TSM), F.C. Tseng, president, said "We are very excited to have played a key role in bringing configurable processor technology to the many markets we serve.  Xtensa is the most complete product of its kind in the marketplace and because of Tensilica's unique licensing approach, I think it will have significant appeal with our customers."

Tensilica used a design flow consisting of Synopsys tools for synthesis and Verilog simulation and layout tools from Arcadia Design Systems and Avant! (Nasdaq: AVNT).  Using the Xtensa Processor Generator, the design team created a customized processor consisting of a 5-stage pipeline, a 64-entry windowed register file, and a number of interrupt, timer, and on-chip debug options. "The processor generator created the high level Verilog RTL source and a complete set of GNU-based software development tools in about an hour" according to Rowen, "Then the team targeted the Artisan standard cell library and Virage Logic memory compilers for TSMC's process."

Artisan Components, Inc.'s (Nasdaq: ARTI) president, Mark Templeton, said, "It is thrilling to see how quickly Tensilica has been able to develop and validate a complex, state of the art processor. Their accomplishment is an important milestone for Artisan as it clearly demonstrates the time-to-market benefits of our products as well as the value of our partnership business model. We look forward to future successes with Tensilica as well as with other pioneering IP suppliers."

According to Virage Logic CEO Adam Kablanian, "Tensilica made use of the byte-writeable feature of our memory compilers in the original design of the Xtensa architecture.  The ability to select between high performance and low power memory cores was also key in supporting the designers' ability to make tradeoffs in the configuration of the core."

Bernie Rosenthal, Tensilica's vice president of marketing and business development, noted " Xtensa is being actively designed into high visibility products in the networking and consumer electronics markets.  We would expect to see production silicon available in the market in Q3 of this year."

Tensilica was founded in July 1997 to address the fast growing market for application-specific microprocessor cores and software development tools in high volume, embedded systems.  Using th e company's proprietary Xtensa Processor Generator, system-on-a-chip (SOC) designers can develop a processor subsystem hardware design and a complete software development tool environment tailored to their specific requirements in hours.  Tensilica's solutions provide a proven, easy-to-use, methodology that enables designers achieve optimum application performance in minimum design time. The Company is engaged in research, development, and customer support from its offices in Santa Clara, California, Waltham, Massachusetts, and Tokyo, Japan.

Tensilica is headquartered in Santa Clara, California (95054) at 3255-6 Scott Boulevard, and can be reached at (408) 986-8000 or via the World Wide Web at  http://www.tensilica.com .