Articles 2002


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Home > News & Events > Articles > 2002

Articles 2002

Tensilica gets mentioned in a lot of articles. We picked out a few of the best.
12/12/02	The search is over: The 2002 top products are here - EDN Magazine
12/09/02	DSP Envy is Everywhere - EE Times
12/01/02	Reducing SOC Simulation and Development Time - IEEE Computer - link to PDF
11/15/02	Patents stir debate in configurable-processor arena - EE Times
11/11/02	Tensilica Sends Shot Across CPU Core Bow - Electronic News
10/28/02	Ikanos Chip Set Unifies DMT Coding for DSL types - EE Times
10/21/02	Newcomers Spin Storage Network Silicon - EE Times
10/14/02	Cypress Looks to Create Configurable USB Transceiver - Electronic News
10/14/02	Processors begin 64-bit push - EE Times
10/07/02	Tensilica Adopts CoreConnect Bus - Microprocessor Report
09/16/02	Tensilica Xtensa V Hits 350 MHz - Microprocessor Report PDF link!!!
09/12/02	Code coverage techniques - a hands-on view - EE Times
09/12/02	Configurability or reconfigurability? - EE Times
09/12/02	Tensilica Aces Benchmarks - EE Times
09/05/02	Multiprocessor SOC Design Advances - EDN Magazine
09/02/02	Architecture targets multiprocessor system-on-a-chip applications - Electronic Design
08/30/02	Tensilica Aims Xtensa V Core at Linking CPUs in Single Design - Electronics Supply & Manufacturing
08/27/02	Tensilica update gives core more chip choices - EE Times
08/26/02	Tensilica clears path to multiprocessor SOCs - EE Times
08/19/02	Fortunes Changing in Asia: China's Handset Makers Take on the Global Giants - Wireless Week
08/08/02	Fear and Loathing of Porting Embedded Software - EDN Magazine
07/22/02	TranSwitch draws metro processing, switching plans - EE Times
07/08/02	A Fork in the Road for 3G Mobile Handset Design - Electronic News
06/13/02	Designers, providers weigh value of unified tools - EE Times
05/28/02	Closing the custom gap - EE Times
05/03/02	STMicro face-recognition processor includes FPGA core - EE Times
05/01/02	Processor forum examines embedded cache, architectures - EE Times
04/08/02	IP Still on the DSP Attack - Electronic News
04/02/02	Virtual IP Group Intros MP3 Decoder for Xtensa Processor - EDN Magazine
03/21/02	EDN's 2001 Innovation Winners - EDN Magazine
03/07/02	Program Draws IP Cores into IBM's Design Flow - EE Times
03/01/02	Generating the Ideal Processor - Electronic Business
02/08/02	How to Extend Configurable CPU Performance - EE Times

RECOGNITION

QUOTABLE

“It is faster and easier to design complex SOCs using Xtensa configurable processors - especially when using the XPRES Compiler - than to hand-code complex SOC design elements in hardware using traditional RTL methods. Plus the Xtensa processors are programmable, so it will be valuable for future products and applications.”

- Katsuhiko Nishizawa, general manager of the IJP Design Department of the Imaging Products Operations Division of Seiko Epson Corporation.