ClariPhy Licenses Tensilica’s Xtensa Dataplane Processor (DPU) for Optical Networking Mixed Signal, Digital Signal Processing (MXSP) SOCs
Santa Clara, CA USA - March 1, 2012 - Tensilica, Inc. today announced that ClariPhy Communications, Inc., a leading developer of ultra-high speed mixed signal, digital signal processing (MXSP) system-on-chip (SOC) solutions for coherent optical networks, has licensed Tensilica's Xtensa dataplane processor unit (DPU) for a deeply embedded control application.
"We benchmarked other CPU and controller cores and selected Tensilica's Xtensa DPU because it offered us a unique combination of a robust standard architecture with a rich third party ecosystem, plus the ability to configure and extend the core to meet our exact applications need," stated Reza Norouzian, vice president of sales and business development at ClariPhy. "With Tensilica, we are able to leverage the reuse advantages while still reaping the benefits of differentiation arising from customization of the core."
"ClariPhy is aggressively pushing both high-performance and high-integration in optical networking infrastructure applications," stated Steve Roddy, Tensilica's vice president of marketing and business development. "As they strive for maximum performance at the lowest possible power, our automated processor core customization technology will help them reach their design goals."
ClariPhy Communications, Inc. develops mixed signal, advanced digital signal processing (MXSP) ICs targeting 10G, 40G, 100G and beyond for optical networks. ClariPhy's LightSpeed SoCs increase capacity and reach while eliminating costly regeneration equipment, simplifying network management and lowering system CAPEX and OPEX costs. ClariPhy's investors include Nokia Siemens Networks, Oclaro, Norwest Venture Partners, Onset Ventures, and Allegis Capital. ClariPhy is headquartered in Irvine, California with offices in Los Altos, California and Cordoba, Argentina. For more information, please visit http://www.clariphy.com.
Tensilica, Inc. is the leader in dataplane processor IP cores. Dataplane processors (DPUs) are a superset of DSPs and CPUs that can scale from tiny micro signal processors to programmable offload accelerators and powerful DSPs. DPUs deliver 10 to 100x the performance because they can be optimized using Tensilica's automated design tools to meet specific and demanding signal processing performance and efficiency targets. Tensilica's DPUs power SOC designs at many Tier 1 system OEMs and seven out of the top 10 semiconductor companies for designs in mobile wireless, telecom and network infrastructure, computing and storage, and home and auto entertainment. For more information on Tensilica's patented, benchmark-proven DPUs visit www.tensilica.com.
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- Tensilica and Xtensa are registered trademarks belonging to Tensilica, Inc. All other company and product names mentioned are trademarks and/or registered trademarks of their respective owners.
- Tensilica's announced licensees include: Afa Technologies, ALPS, Aquantia, Astute Networks, Atheros, AMD, Avision, Bay Microsystems, Brocade, Broadcom, Cavium, Chelsio, Cisco Systems, CMC Microsystems, Conexant Systems, Design Art Networks, EE Solutions, Epson, Fujitsu Ltd., Fujitsu Semiconductor, Huawei, iBiquity Digital, Ikanos Communications, Intel, Juniper Networks, LG Electronics, Lucid Information Technology, Marvell, Maxim, NEC Corporation, Nethra Imaging, Novatek, NuFront, NXP, Olympus Optical Co. Ltd., Panasonic Mobile, Plato Networks, PnpNetwork Technologies, PowerLayer Microsystems, QLogic, Samsung, Shanghai High Definition Digital Technology Industrial Corporation SiBEAM, Sirius XM Radio ,Sony, Stretch, TranSwitch Corporation, Triductor Technology, Valens Semiconductor, Validity Sensors, VIA, Victor Company of Japan (JVC), and Wolfson Microelectronics.