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You’ve read about how much you can accelerate performance and lower power by customizing a Tensilica processor core. How exactly do you do that?
You customize an Xtensa processor using a simple 2-step process that takes place within Xplorer, Tensilica’s easy-to-use Eclipse-based Integrated Design Environment (IDE).
Configure the processor by simply clicking on the options you want in your core.

Sample Configuration Screen Shot
Check out all of the configuration options.
Add your own custom instructions. It's easier and faster to add new instructions to an Xtensa processor than to design a Verilog hardware block to perform that function. You can express the desired functionality in the Tensilica Instruction Extension (TIE) language. TIE is a Verilog-like language used to describe desired custom instructions. You can also specify that a complex instruction be implemented as a multi-cycle instruction with a single TIE language directive. TIE helps you get orders of magnitude performance increases out of your processor design. See our example below.
A designer creates a TIE file defining new functions and data types using the TIE development and analysis tools in Xtensa Xplorer. The TIE file can be used with the TIE compiler to create updated software tools and instruction set simulator within minutes, on the desktop. Try this with other configurable processors, and you’ll have to integrate new instructions manually over a span of several weeks.
Adding TIE instructions to a Tensilica processor core never compromises the underlying base Xtensa instruction set, thereby ensuring availability of a robust ecosystem of third party application software and development tools. All configurable, extensible Xtensa processors are always compatible with major operating systems, debug probes and ICE solutions; and always come with an automatically generated, complete software development toolchain including an advanced integrated development environment based on the ECLIPSE framework, a world-class compiler, a cycle-accurate SystemC-compatible instruction set simulator, and the full industry-standard GNU toolchain.
Consider the following C function byteswap, which performs a 32-bit endian conversion:
byteswap(unsigned swap_in)
This function requires many cycles to compute in software; however, it can be computed in a single cycle with a TIE operation. A useful technique for accelerating "hot spots" with TIE is to combine multiple operators into a fusion operation. A fusion operation combines a set of simple, connected operations to a single complex operation. This combination enables the Xtensa processor to perform more computations per operation, creates opportunities to share input operands, and eliminates the need to store and fetch intermediate operands.
All the operations used to perform the byteswap function are fused and optimized in the following TIE operation.
operation byteswap ; }
These few lines are all that are necessary to extend the Xtensa processor with a custom operation that performs an endian conversion on a 32-bit word. The TIE compiler automatically extends all the software tools to enable development using the new operation.
The original C code is now replaced by an intrinsic that performs the same function, as indicated in the following sample code:
#include unsigned int myFunc()