Use Simple Configuration Options to Optimize
Performance
This first example, from the cellular telephone
world, involves the GSM audio codec used in cell
phones. Profiling the codec code using an unaugmented
RISC processor revealed that out of the more
than 200 million processor cycles, 80% of the
cycles were devoted to executing multiplications.
The simple addition of a hardware multiplier,
therefore, would substantially accelerate this
software. The Xtensa processor offers a multiplier
as a configuration option.
The addition of a hardware multiplier reduces
the number of cycles needed to execute the GSM
audio codec code from 204 million cycles to 28
million cycles, a 7x improvement.
Adding a few more gates to the processor pipeline
by selecting a multiplier/accumulator rather
than a multiplier further reduces the number
of cycles needed to execute the codec code to
17.9 million cycles, an 11x improvement over
the original code.
By providing a wide range of configuration
options,
designers can profile the code to rapidly explore
a design space and make informed trade-offs.
Configuration options coupled with code profiling
allow a SoC designer to rapidly explore a design
space and to make informed cost/benefit decisions
for various design approaches.
< previous
page | next page >
|