Using and Customizing DPUs is Easier Than You Think
Customizing Cadence's Tensilica DPUs is much easier than you think, and much faster than designing RTL hardware blocks. The unique, patented Tensilica methodology reduces design risk by automating much of the process and by helping you to rapidly create individually tailored processors and DSPs with their associated development tools that are guaranteed correct by construction.
You only need to understand your application's requirements. Our tools help you profile your code, figure out the best customizations, and create the best possible DPU. Our design methodology produces standard hardware RTL that can be synthesized into your SOC designs and a complete software tool chain and full set of simulation and verification models.