Advanced Development Tools for Tensilica’s Diamond Standard Processors
Features:
Benefits:
- Easy to use Xplorer-DE GUI based on Eclipse platform that is familiar to many developers
- Advanced optimizing compiler that generates high-performance and small code size
- Compiler offers state of the art inter-procedural and alias analysis
- Automatic vectorization of operations for Diamond 545CK
- Automatic VLIW instruction bundling for multi-issue Diamond cores
- Cycle-accurate instruction set simulator (ISS) provides detailed pipeline information
- One toolchain supports all Diamond Standard cores
- Based on familiar GNU toolchain
Check out our Diamond FREE software evaluation.
The Diamond Standard Processor software development tools are a comprehensive collection of code generation and analysis tools for the Diamond Processor family. Included in this full GUI-based environment are a complete compiler toolchain, instruction set simulator, performance analysis tools and project management tools.
Xplorer DE is a fully integrated GUI that incorporates all the software development tools for the Diamond Standard processors. Users can thus use Xplorer DE to create, build, simulate, profile, debug, and analyze code targeted for the Diamond Standard Processor family. Furthermore, Xplorer DE is based on the popular and familiar Eclipse platform. Xplorer DE contains extensive context-sensitive help, along with tutorials and sample workspaces that enable developers to quickly start developing code for the Diamond processors. Built-in project management and version control mechanisms eliminates the need to maintain makefiles and provides a clean environment for new project builds.
Tensilica’s XCC C/C++ compiler is an optimizing compiler with advanced optimizations such as profile-directed feedback compilation, inter-procedural analysis and optimizations, alias analysis, function in-lining, software pipelining, static single assignment (SSA) optimizations, and code generation techniques to reduce code size. Based on industry standard benchmarks, the XCC compiler generates the highest code density when compared to compilers for other 32-bit RISC architectures.
The rest of the software development toolchain is based on standard GNU tools. The compiler front-end remains similar to the preprocessor in the GCC compiler -- hence the flags for the preprocessor remain the same. The assembler and linker also utilize the same flags as the GNU versions of the tools.
The GUI based debugger allows full system visibility into a developer’s project. Source/assembly and hardware registers are visible while debugging an application. Multiple views of various system aspects can be simultaneously displayed within the Xplorer DE environment. The debugger interoperates seamlessly with the other development tools (compiler toolchain, instruction set simulator) to allow rapid code development for Diamond Standard processor systems.
The Xplorer DE environment enables graphical visualization of profiling results generated by Tensilica’s pipeline-accurate ISS. Code developers can hence view accurate performance modeling information such as cache performance, cycle counts, branch penalties, exceptions, pipeline views, and tracing in tabular and graphical views. For fast functional simulation, Tensilica offers TurboXim.
An optional full-speed, non-intrusive instruction trace capability is an optiona for all Diamond Standard cores. Tensilica’s TRAX-PC processor trace capture macrocell is Nexus 5001 compatible and ideal for debugging complex, challenging real-time applications such as engine and motor control. Software control and use of the on-chip TRAX hardware is fully integrated into Tensilica’s Xplorer integrated design environment (IDE) so software engineers can easily develop and debug programs while using the TRAX-PC trace macrocell. For more information, see this page.
Tensilica's Xtensa Modeling Protocol (XTMP) application programming interface (API) is available to simulate systems that consist of multiple Diamond or Xtensa processors. Designers can also use Tensilica's XTensa SystemC Modeling (XTSC) to simulate designs in SystemC.
This software development environment is a complete GUI-based collection of tools for developers creating code for systems based on the Diamond Standard processors. From project implementation to code generation to analysis, the Diamond software tools enable developers to achieve a quick time-to-market while employing one of the most efficient 32-bit architectures available today. Diamond Standard processors lower total system costs and help design teams achieve rapid system development.
Screen Shots
Xplorer DE Debug Screen
Xplorer DE Profiler
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